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authorDan Halbert <halbert@adafruit.com>2019-08-22 13:14:40 -0400
committerGitHub <noreply@github.com>2019-08-22 13:14:40 -0400
commit18f441ae3519899fbdff5afc2d2e47a94cb36a73 (patch)
tree8cfb97c75b09a39414f248f2e9ba198f5b5eadf2 /ports
parent6aa311aabd8372a69361f23f4de07dae16145c18 (diff)
parent0b7291d76726616ade481bb802994bcd81dbb98f (diff)
Merge pull request #2083 from dhalbert/no-32khz-xtal
Fix CPBlue LFCLKSRC; CPB has no status neopixel
Diffstat (limited to 'ports')
-rw-r--r--ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h7
-rw-r--r--ports/nrf/common-hal/bleio/Adapter.c35
-rw-r--r--ports/nrf/common-hal/bleio/Characteristic.c2
-rw-r--r--ports/nrf/mpconfigport.h5
-rw-r--r--ports/nrf/peripherals/nrf/clocks.c18
5 files changed, 27 insertions, 40 deletions
diff --git a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h
index 04c7e8d60..1e55cd026 100644
--- a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h
+++ b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h
@@ -34,10 +34,11 @@
#define FLASH_SIZE (0x100000)
#define FLASH_PAGE_SIZE (4096)
-#define MICROPY_HW_NEOPIXEL (&pin_P0_13)
-
#define MICROPY_HW_LED_STATUS (&pin_P1_14)
+// Unusually, board does not have a 32 kHz xtal. Nearly all boards do.
+#define BOARD_HAS_32KHZ_XTAL (0)
+
#if QSPI_FLASH_FILESYSTEM
#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 21)
#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 23)
@@ -60,8 +61,6 @@
#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE)
-#define BOARD_HAS_CRYSTAL 1
-
#define DEFAULT_I2C_BUS_SCL (&pin_P0_04)
#define DEFAULT_I2C_BUS_SDA (&pin_P0_05)
diff --git a/ports/nrf/common-hal/bleio/Adapter.c b/ports/nrf/common-hal/bleio/Adapter.c
index 70e87cf78..15ae8840b 100644
--- a/ports/nrf/common-hal/bleio/Adapter.c
+++ b/ports/nrf/common-hal/bleio/Adapter.c
@@ -39,37 +39,26 @@
#include "supervisor/usb.h"
#include "shared-bindings/bleio/Adapter.h"
#include "shared-bindings/bleio/Address.h"
-#include "mpconfigboard.h" // for BOARD_HAS_CRYSTAL
STATIC void softdevice_assert_handler(uint32_t id, uint32_t pc, uint32_t info) {
mp_raise_msg_varg(&mp_type_AssertionError,
translate("Soft device assert, id: 0x%08lX, pc: 0x%08lX"), id, pc);
}
-static inline bool board_has_crystal(void) {
-#ifdef BOARD_HAS_CRYSTAL
- return BOARD_HAS_CRYSTAL == 1;
+STATIC uint32_t ble_stack_enable(void) {
+ nrf_clock_lf_cfg_t clock_config = {
+#if BOARD_HAS_32KHZ_XTAL
+ .source = NRF_CLOCK_LF_SRC_XTAL,
+ .rc_ctiv = 0,
+ .rc_temp_ctiv = 0,
+ .accuracy = NRF_CLOCK_LF_ACCURACY_20_PPM,
#else
- return false;
+ .source = NRF_CLOCK_LF_SRC_RC,
+ .rc_ctiv = 16,
+ .rc_temp_ctiv = 2,
+ .accuracy = NRF_CLOCK_LF_ACCURACY_250_PPM,
#endif
-}
-
-STATIC uint32_t ble_stack_enable(void) {
- nrf_clock_lf_cfg_t clock_config;
-
- // Set low-frequency clock source to be either an external 32.768kHz crystal if one exists on the board
- // or an internal 32.768 kHz RC oscillator otherwise
- if (board_has_crystal()) {
- clock_config = (nrf_clock_lf_cfg_t){
- .source = NRF_CLOCK_LF_SRC_XTAL,
- .accuracy = NRF_CLOCK_LF_ACCURACY_20_PPM};
- } else {
- clock_config = (nrf_clock_lf_cfg_t){
- .source = NRF_CLOCK_LF_SRC_RC,
- .rc_ctiv = 16,
- .rc_temp_ctiv = 2,
- .accuracy = NRF_CLOCK_LF_ACCURACY_250_PPM};
- }
+ };
uint32_t err_code = sd_softdevice_enable(&clock_config, softdevice_assert_handler);
if (err_code != NRF_SUCCESS)
diff --git a/ports/nrf/common-hal/bleio/Characteristic.c b/ports/nrf/common-hal/bleio/Characteristic.c
index 45e8d2495..604d24d73 100644
--- a/ports/nrf/common-hal/bleio/Characteristic.c
+++ b/ports/nrf/common-hal/bleio/Characteristic.c
@@ -183,7 +183,7 @@ void common_hal_bleio_characteristic_set_value(bleio_characteristic_obj_t *self,
(self->props & CHAR_PROP_WRITE_NO_RESPONSE));
} else {
if (self->fixed_length && bufinfo->len != self->max_length) {
- mp_raise_ValueError(translate("Value length required fixed length"));
+ mp_raise_ValueError(translate("Value length != required fixed length"));
}
if (bufinfo->len > self->max_length) {
mp_raise_ValueError(translate("Value length > max_length"));
diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h
index 5ed521e85..0b755a156 100644
--- a/ports/nrf/mpconfigport.h
+++ b/ports/nrf/mpconfigport.h
@@ -53,6 +53,11 @@
#include "py/circuitpy_mpconfig.h"
+#ifndef BOARD_HAS_32KHZ_XTAL
+// Assume crystal is present, which is the most common case.
+#define BOARD_HAS_32KHZ_XTAL (1)
+#endif
+
#define MICROPY_PORT_ROOT_POINTERS \
CIRCUITPY_COMMON_ROOT_POINTERS \
ble_drv_evt_handler_entry_t* ble_drv_evt_handler_entries; \
diff --git a/ports/nrf/peripherals/nrf/clocks.c b/ports/nrf/peripherals/nrf/clocks.c
index de9eec6b5..269365cc9 100644
--- a/ports/nrf/peripherals/nrf/clocks.c
+++ b/ports/nrf/peripherals/nrf/clocks.c
@@ -26,21 +26,15 @@
*/
#include "nrfx.h"
-#include "mpconfigboard.h" // for BOARD_HAS_CRYSTAL
+#include "mpconfigport.h"
-static inline bool board_has_crystal(void) {
-#ifdef BOARD_HAS_CRYSTAL
- return BOARD_HAS_CRYSTAL == 1;
+void nrf_peripherals_clocks_init(void) {
+
+#if BOARD_HAS_32KHZ_XTAL
+ NRF_CLOCK->LFCLKSRC = (uint32_t)((CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk);
#else
- return false;
+ NRF_CLOCK->LFCLKSRC = (uint32_t)((CLOCK_LFCLKSRC_SRC_RC << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk);
#endif
-}
-
-void nrf_peripherals_clocks_init(void) {
- // Set low-frequency clock source to be either an external 32.768kHz crystal if one exists on the board
- // or an internal 32.768 kHz RC oscillator otherwise
- uint32_t clock_src = board_has_crystal() ? CLOCK_LFCLKSRC_SRC_Xtal : CLOCK_LFCLKSRC_SRC_RC;
- NRF_CLOCK->LFCLKSRC = (uint32_t)((clock_src << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk);
NRF_CLOCK->TASKS_LFCLKSTART = 1UL;
// Wait for clocks to start.