Merge remote-tracking branch 'origin/main' into thunderpack1.2

87 files changed, 2613 insertions, 268 deletions

diff --git a/ports/atmel-samd/Makefile b/ports/atmel-samd/Makefile
index 1ee21679d..dc7b4e4c8 100644
--- a/ports/atmel-samd/Makefile
+++ b/ports/atmel-samd/Makefile
@@ -197,6 +197,7 @@ endif
 
 
 LDFLAGS = $(CFLAGS) -nostartfiles -Wl,-nostdlib -Wl,-T,$(GENERATED_LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs
+LDFLAGS += -flto=$(shell $(NPROC))
 LIBS := -lgcc -lc
 
 # Use toolchain libm if we're not using our own.
diff --git a/ports/atmel-samd/boards/bdmicro_vina_d51/mpconfigboard.h b/ports/atmel-samd/boards/bdmicro_vina_d51/mpconfigboard.h
index 6bc9bb706..8b015df05 100644
--- a/ports/atmel-samd/boards/bdmicro_vina_d51/mpconfigboard.h
+++ b/ports/atmel-samd/boards/bdmicro_vina_d51/mpconfigboard.h
@@ -12,14 +12,14 @@
 
 #define BOARD_HAS_CRYSTAL 1
 
-#define DEFAULT_I2C_BUS_SDA (&pin_PB02)
-#define DEFAULT_I2C_BUS_SCL (&pin_PB03)
+#define DEFAULT_I2C_BUS_SCL (&pin_PA16)
+#define DEFAULT_I2C_BUS_SDA (&pin_PA17)
+#define DEFAULT_UART_BUS_RX (&pin_PB20)
+#define DEFAULT_UART_BUS_TX (&pin_PB21)
 #define DEFAULT_SPI_BUS_MISO (&pin_PB23)
-#define DEFAULT_UART_BUS_TX (&pin_PB24)
-#define DEFAULT_UART_BUS_RX (&pin_PB25)
 #define DEFAULT_SPI_BUS_MOSI (&pin_PC27)
 #define DEFAULT_SPI_BUS_SCK (&pin_PC28)
-#define MICROPY_HW_LED_STATUS (&pin_PA15)
+#define MICROPY_HW_LED_STATUS (&pin_PA23)
 #define MICROPY_HW_LED_RX (&pin_PC05)
 #define MICROPY_HW_LED_TX (&pin_PC06)
 
diff --git a/ports/atmel-samd/boards/bdmicro_vina_d51/pins.c b/ports/atmel-samd/boards/bdmicro_vina_d51/pins.c
index 931e0328f..8eeab8a9a 100644
--- a/ports/atmel-samd/boards/bdmicro_vina_d51/pins.c
+++ b/ports/atmel-samd/boards/bdmicro_vina_d51/pins.c
@@ -1,64 +1,70 @@
 #include "shared-bindings/board/__init__.h"
 
 STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PB08) },
-    { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB09) },
-    { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PC00) },
-    { MP_ROM_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_PC01) },
-    { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA04) },
-    { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA06) },
-    { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA07) },
-    { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB00) },
-    { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB01) },
-    { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB05) },
-    { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PB06) },
-    { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PB07) },
-    { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PC10) },
-    { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PC11) },
-    { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA14) },
-    { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA13) },
-    { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB14) },
-    { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB15) },
-    { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PC20) },
-    { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PC21) },
-    { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA12) },
-    { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB31) },
-    { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA16) },
-    { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA17) },
+    { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA04) },
+    { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA06) },
+    { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PB07) },
+    { MP_ROM_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_PC00) },
+    { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA07) },
+    { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB08) },
+    { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB09) },
+    { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PC02) },
+    { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PC03) },
+    { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB04) },
+    { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PB05) },
+    { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PB06) },
+    { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB31) },
+    { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PC16) },
+    { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PC13) },
+    { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA14) },
+    { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA15) },
+    { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PB12) },
+    { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PB13) },
+    { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PC17) },
+    { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PC18) },
+    { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PC19) },
+    { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PC20) },
+    { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PC21) },
+    { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB18) },
+    { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PB19) },
+    { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PC12) },
     { MP_ROM_QSTR(MP_QSTR_DAC0), MP_ROM_PTR(&pin_PA02) },
     { MP_ROM_QSTR(MP_QSTR_DAC1), MP_ROM_PTR(&pin_PA05) },
-    { MP_ROM_QSTR(MP_QSTR_ESP01_EN), MP_ROM_PTR(&pin_PC03) },
+    { MP_ROM_QSTR(MP_QSTR_ESP01_EN), MP_ROM_PTR(&pin_PC15) },
+    { MP_ROM_QSTR(MP_QSTR_E5), MP_ROM_PTR(&pin_PC15) },
     { MP_ROM_QSTR(MP_QSTR_ESP01_GPIO0), MP_ROM_PTR(&pin_PA18) },
-    { MP_ROM_QSTR(MP_QSTR_UART3_RTS), MP_ROM_PTR(&pin_PA18) },
+    { MP_ROM_QSTR(MP_QSTR_E3), MP_ROM_PTR(&pin_PA18) },
     { MP_ROM_QSTR(MP_QSTR_ESP01_GPIO2), MP_ROM_PTR(&pin_PA19) },
-    { MP_ROM_QSTR(MP_QSTR_UART3_CTS), MP_ROM_PTR(&pin_PA19) },
-    { MP_ROM_QSTR(MP_QSTR_ESP01_RESET), MP_ROM_PTR(&pin_PC02) },
-    { MP_ROM_QSTR(MP_QSTR_ESP01_RX), MP_ROM_PTR(&pin_PB21) },
-    { MP_ROM_QSTR(MP_QSTR_UART3_RX), MP_ROM_PTR(&pin_PB21) },
-    { MP_ROM_QSTR(MP_QSTR_ESP01_TX), MP_ROM_PTR(&pin_PB20) },
-    { MP_ROM_QSTR(MP_QSTR_UART3_TX), MP_ROM_PTR(&pin_PB20) },
-    { MP_ROM_QSTR(MP_QSTR_I2C_SCL), MP_ROM_PTR(&pin_PB03) },
-    { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB03) },
-    { MP_ROM_QSTR(MP_QSTR_I2C_SDA), MP_ROM_PTR(&pin_PB02) },
-    { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB02) },
+    { MP_ROM_QSTR(MP_QSTR_E4), MP_ROM_PTR(&pin_PA19) },
+    { MP_ROM_QSTR(MP_QSTR_ESP01_RESET), MP_ROM_PTR(&pin_PC14) },
+    { MP_ROM_QSTR(MP_QSTR_E6), MP_ROM_PTR(&pin_PC14) },
+    { MP_ROM_QSTR(MP_QSTR_ESP01_RX), MP_ROM_PTR(&pin_PA12) },
+    { MP_ROM_QSTR(MP_QSTR_UART3_RX), MP_ROM_PTR(&pin_PA12) },
+    { MP_ROM_QSTR(MP_QSTR_I2C3_SCL), MP_ROM_PTR(&pin_PA12) },
+    { MP_ROM_QSTR(MP_QSTR_E2), MP_ROM_PTR(&pin_PA12) },
+    { MP_ROM_QSTR(MP_QSTR_ESP01_TX), MP_ROM_PTR(&pin_PA13) },
+    { MP_ROM_QSTR(MP_QSTR_UART3_TX), MP_ROM_PTR(&pin_PA13) },
+    { MP_ROM_QSTR(MP_QSTR_I2C3_SDA), MP_ROM_PTR(&pin_PA13) },
+    { MP_ROM_QSTR(MP_QSTR_E1), MP_ROM_PTR(&pin_PA13) },
+    { MP_ROM_QSTR(MP_QSTR_I2C1_SCL), MP_ROM_PTR(&pin_PA16) },
+    { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA16) },
+    { MP_ROM_QSTR(MP_QSTR_I2C1_SDA), MP_ROM_PTR(&pin_PA17) },
+    { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA17) },
     { MP_ROM_QSTR(MP_QSTR_I2S_FS_0), MP_ROM_PTR(&pin_PA20) },
-    { MP_ROM_QSTR(MP_QSTR_I2S_FS_1), MP_ROM_PTR(&pin_PA23) },
     { MP_ROM_QSTR(MP_QSTR_I2S_MCK_0), MP_ROM_PTR(&pin_PB17) },
-    { MP_ROM_QSTR(MP_QSTR_I2S_MCK_1), MP_ROM_PTR(&pin_PB13) },
     { MP_ROM_QSTR(MP_QSTR_I2S_SCK_0), MP_ROM_PTR(&pin_PB16) },
-    { MP_ROM_QSTR(MP_QSTR_I2S_SCK_1), MP_ROM_PTR(&pin_PB12) },
     { MP_ROM_QSTR(MP_QSTR_I2S_SDI), MP_ROM_PTR(&pin_PA22) },
     { MP_ROM_QSTR(MP_QSTR_I2S_SDO), MP_ROM_PTR(&pin_PA21) },
-    { MP_ROM_QSTR(MP_QSTR_LED_B), MP_ROM_PTR(&pin_PA15) },
-    { MP_ROM_QSTR(MP_QSTR_LED_STATUS), MP_ROM_PTR(&pin_PA15) },
-    { MP_ROM_QSTR(MP_QSTR_LED_G), MP_ROM_PTR(&pin_PB18) },
-    { MP_ROM_QSTR(MP_QSTR_LED_R), MP_ROM_PTR(&pin_PB19) },
+    { MP_ROM_QSTR(MP_QSTR_LED_B), MP_ROM_PTR(&pin_PA23) },
+    { MP_ROM_QSTR(MP_QSTR_LED_STATUS), MP_ROM_PTR(&pin_PA23) },
+    { MP_ROM_QSTR(MP_QSTR_LED_G), MP_ROM_PTR(&pin_PB15) },
+    { MP_ROM_QSTR(MP_QSTR_LED_R), MP_ROM_PTR(&pin_PB14) },
     { MP_ROM_QSTR(MP_QSTR_LED_RX), MP_ROM_PTR(&pin_PC05) },
     { MP_ROM_QSTR(MP_QSTR_LED_TX), MP_ROM_PTR(&pin_PC06) },
-    { MP_ROM_QSTR(MP_QSTR_RS485_RE), MP_ROM_PTR(&pin_PC15) },
-    { MP_ROM_QSTR(MP_QSTR_RS485_RX), MP_ROM_PTR(&pin_PC13) },
-    { MP_ROM_QSTR(MP_QSTR_RS485_TE), MP_ROM_PTR(&pin_PC14) },
-    { MP_ROM_QSTR(MP_QSTR_RS485_TX), MP_ROM_PTR(&pin_PC12) },
+    { MP_ROM_QSTR(MP_QSTR_RS485_RE), MP_ROM_PTR(&pin_PB01) },
+    { MP_ROM_QSTR(MP_QSTR_RS485_RX), MP_ROM_PTR(&pin_PB03) },
+    { MP_ROM_QSTR(MP_QSTR_RS485_TE), MP_ROM_PTR(&pin_PB00) },
+    { MP_ROM_QSTR(MP_QSTR_RS485_TX), MP_ROM_PTR(&pin_PB02) },
     { MP_ROM_QSTR(MP_QSTR_SPI_MISO), MP_ROM_PTR(&pin_PB23) },
     { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB23) },
     { MP_ROM_QSTR(MP_QSTR_SPI_MOSI), MP_ROM_PTR(&pin_PC27) },
@@ -67,14 +73,16 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PC28) },
     { MP_ROM_QSTR(MP_QSTR_SPI_SS), MP_ROM_PTR(&pin_PB22) },
     { MP_ROM_QSTR(MP_QSTR_SS), MP_ROM_PTR(&pin_PB22) },
-    { MP_ROM_QSTR(MP_QSTR_UART1_CTS), MP_ROM_PTR(&pin_PC19) },
-    { MP_ROM_QSTR(MP_QSTR_UART1_RTS), MP_ROM_PTR(&pin_PC18) },
-    { MP_ROM_QSTR(MP_QSTR_UART1_RX), MP_ROM_PTR(&pin_PC17) },
-    { MP_ROM_QSTR(MP_QSTR_UART1_TX), MP_ROM_PTR(&pin_PC16) },
-    { MP_ROM_QSTR(MP_QSTR_UART2_RX), MP_ROM_PTR(&pin_PB25) },
-    { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB25) },
-    { MP_ROM_QSTR(MP_QSTR_UART2_TX), MP_ROM_PTR(&pin_PB24) },
-    { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB24) },
+    { MP_ROM_QSTR(MP_QSTR_UART1_CTS), MP_ROM_PTR(&pin_PC25) },
+    { MP_ROM_QSTR(MP_QSTR_UART1_RTS), MP_ROM_PTR(&pin_PC24) },
+    { MP_ROM_QSTR(MP_QSTR_UART1_RX), MP_ROM_PTR(&pin_PB24) },
+    { MP_ROM_QSTR(MP_QSTR_UART1_TX), MP_ROM_PTR(&pin_PB25) },
+    { MP_ROM_QSTR(MP_QSTR_UART2_RX), MP_ROM_PTR(&pin_PB20) },
+    { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB20) },
+    { MP_ROM_QSTR(MP_QSTR_I2C2_SCL), MP_ROM_PTR(&pin_PB20) },
+    { MP_ROM_QSTR(MP_QSTR_UART2_TX), MP_ROM_PTR(&pin_PB21) },
+    { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB21) },
+    { MP_ROM_QSTR(MP_QSTR_I2C2_SDA), MP_ROM_PTR(&pin_PB21) },
     { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
     { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
     { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
diff --git a/ports/atmel-samd/boards/dynossat_edu_eps/mpconfigboard.mk b/ports/atmel-samd/boards/dynossat_edu_eps/mpconfigboard.mk
index 3c0cc07be..6d2c1379d 100644
--- a/ports/atmel-samd/boards/dynossat_edu_eps/mpconfigboard.mk
+++ b/ports/atmel-samd/boards/dynossat_edu_eps/mpconfigboard.mk
@@ -12,11 +12,15 @@ EXTERNAL_FLASH_DEVICE_COUNT = 1
 EXTERNAL_FLASH_DEVICES = "GD25Q32C"
 LONGINT_IMPL = MPZ
 
+CIRCUITPY_FULLBUILD = 0
 CIRCUITPY_BITBANGIO = 0
 CIRCUITPY_FREQUENCYIO = 0
 CIRCUITPY_COUNTIO = 0
-CIRCUITPY_I2CPERIPHERAL = 0
+CIRCUITPY_I2CPERIPHERAL = 1
 CIRCUITPY_VECTORIO = 0
+CIRCUITPY_DISPLAYIO = 0
+CIRCUITPY_TOUCHIO = 0
+CIRCUITPY_ROTARYIO = 0
 
 CFLAGS_INLINE_LIMIT = 60
 
diff --git a/ports/atmel-samd/boards/dynossat_edu_eps/pins.c b/ports/atmel-samd/boards/dynossat_edu_eps/pins.c
index a910311d4..f960e6bb0 100644
--- a/ports/atmel-samd/boards/dynossat_edu_eps/pins.c
+++ b/ports/atmel-samd/boards/dynossat_edu_eps/pins.c
@@ -4,17 +4,17 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB11) },
     { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA12) },
     { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB10) },
-    { MP_ROM_QSTR(MP_QSTR_D30), MP_ROM_PTR(&pin_PA30) },
-    { MP_ROM_QSTR(MP_QSTR_D31), MP_ROM_PTR(&pin_PA31) },
+    { MP_ROM_QSTR(MP_QSTR_D26), MP_ROM_PTR(&pin_PA30) },
+    { MP_ROM_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_PA31) },
     { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA17) },
     { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA07) },
     { MP_ROM_QSTR(MP_QSTR_OVTEMP), MP_ROM_PTR(&pin_PA07) },
     { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA16) },
     { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) },
     { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) },
-    { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA11) },
+    { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA11) },
     { MP_ROM_QSTR(MP_QSTR_SAT_RESET), MP_ROM_PTR(&pin_PA11) },
-    { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA10) },
+    { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA10) },
     { MP_ROM_QSTR(MP_QSTR_SAT_PWR_ENABLE), MP_ROM_PTR(&pin_PA10) },
     { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA19) },
     { MP_ROM_QSTR(MP_QSTR_INT_IMU_OBC), MP_ROM_PTR(&pin_PA19) },
@@ -22,10 +22,17 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_PWRMON_SDA), MP_ROM_PTR(&pin_PA04) },
     { MP_ROM_QSTR(MP_QSTR_PWRMON_SCL), MP_ROM_PTR(&pin_PA05) },
     { MP_ROM_QSTR(MP_QSTR_PWRMON_ALERT), MP_ROM_PTR(&pin_PB03) },
+    { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PB09) },
+    { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB02) },
+    { MP_ROM_QSTR(MP_QSTR_V_3V3_MEAS), MP_ROM_PTR(&pin_PB09) },
+    { MP_ROM_QSTR(MP_QSTR_V_5V_MEAS), MP_ROM_PTR(&pin_PB02) },
+    { MP_ROM_QSTR(MP_QSTR_FLASH_SCK), MP_ROM_PTR(&pin_PA23) },
+    { MP_ROM_QSTR(MP_QSTR_FLASH_MOSI), MP_ROM_PTR(&pin_PA22) },
+    { MP_ROM_QSTR(MP_QSTR_FLASH_MISO), MP_ROM_PTR(&pin_PA21) },
+    { MP_ROM_QSTR(MP_QSTR_FLASH_CS), MP_ROM_PTR(&pin_PA20) },
     { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA06) },
     { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA06) },
     { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
-    { MP_ROM_QSTR(MP_QSTR_I2C_MONITOR), MP_ROM_PTR(&board_i2c_obj) },
     { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
     { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
 };
diff --git a/ports/atmel-samd/boards/dynossat_edu_obc/pins.c b/ports/atmel-samd/boards/dynossat_edu_obc/pins.c
index a560360f7..8cc58d92c 100644
--- a/ports/atmel-samd/boards/dynossat_edu_obc/pins.c
+++ b/ports/atmel-samd/boards/dynossat_edu_obc/pins.c
@@ -26,12 +26,16 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB07) },
     { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PB06) },
     { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PB30) },
+    { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA12) },
+    { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA15) },
+    { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PB00) },
     { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA08) },
     { MP_ROM_QSTR(MP_QSTR_D32), MP_ROM_PTR(&pin_PA30) },
     { MP_ROM_QSTR(MP_QSTR_D33), MP_ROM_PTR(&pin_PA31) },
     { MP_ROM_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_PB22) },
     { MP_ROM_QSTR(MP_QSTR_INT_IMU), MP_ROM_PTR(&pin_PA12) },
     { MP_ROM_QSTR(MP_QSTR_SAT_POWER), MP_ROM_PTR(&pin_PA15) },
+    { MP_ROM_QSTR(MP_QSTR_OVTEMP), MP_ROM_PTR(&pin_PB00) },
     { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA08) },
     { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
     { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
diff --git a/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.h b/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.h
index 04565feb4..d48c596ac 100644
--- a/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.h
+++ b/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.h
@@ -33,6 +33,10 @@
 #define DEFAULT_UART_BUS_RX (&pin_PA11)
 #define DEFAULT_UART_BUS_TX (&pin_PA10)
 
+// These pins are connected to the external crystal.
+#define IGNORE_PIN_PA00     1
+#define IGNORE_PIN_PA01     1
+
 // USB is always used internally so skip the pin objects for it.
 #define IGNORE_PIN_PA24     1
 #define IGNORE_PIN_PA25     1
diff --git a/ports/atmel-samd/boards/openbook_m4/board.c b/ports/atmel-samd/boards/openbook_m4/board.c
index f0010f6d7..07dd1741a 100644
--- a/ports/atmel-samd/boards/openbook_m4/board.c
+++ b/ports/atmel-samd/boards/openbook_m4/board.c
@@ -97,7 +97,8 @@ void board_init(void) {
         &pin_PA01, // busy_pin
         false, // busy_state
         5, // seconds_per_frame
-        false); // chip_select (don't always toggle chip select)
+        false, // chip_select (don't always toggle chip select)
+        false); // grayscale
 }
 
 bool board_requests_safe_mode(void) {
diff --git a/ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.h b/ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.h
index d184945f3..80f37429f 100755
--- a/ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.h
+++ b/ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.h
@@ -35,9 +35,6 @@
 #define IGNORE_PIN_PA12     1
 #define IGNORE_PIN_PA15     1
 #define IGNORE_PIN_PA16     1
-#define IGNORE_PIN_PA21     1
-#define IGNORE_PIN_PA22     1
-#define IGNORE_PIN_PA23     1
 #define IGNORE_PIN_PA27     1
 #define IGNORE_PIN_PA28     1
 
diff --git a/ports/atmel-samd/boards/uchip/mpconfigboard.h b/ports/atmel-samd/boards/uchip/mpconfigboard.h
index 1877a41ef..5d6af4b78 100644
--- a/ports/atmel-samd/boards/uchip/mpconfigboard.h
+++ b/ports/atmel-samd/boards/uchip/mpconfigboard.h
@@ -16,8 +16,6 @@
 
 #define IGNORE_PIN_PA27     1
 #define IGNORE_PIN_PA28     1
-#define IGNORE_PIN_PA30     1
-#define IGNORE_PIN_PA31     1
 
 #define IGNORE_PIN_PB01     1
 #define IGNORE_PIN_PB02     1
diff --git a/ports/atmel-samd/boards/uchip/pins.c b/ports/atmel-samd/boards/uchip/pins.c
index 856a22074..de5508110 100644
--- a/ports/atmel-samd/boards/uchip/pins.c
+++ b/ports/atmel-samd/boards/uchip/pins.c
@@ -1,14 +1,18 @@
 #include "shared-bindings/board/__init__.h"
 
 STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA08) },
-    { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA10) },
-    { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA09) },
-    { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA11) },
-    { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA02) },
-    { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA04) },
-    { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA03) },
-    { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA05) },
+    { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA07) },
+    { MP_ROM_QSTR(MP_QSTR_BOOST_EN), MP_ROM_PTR(&pin_PA14) },
+    { MP_ROM_QSTR(MP_QSTR_VEXT_SELECT), MP_ROM_PTR(&pin_PA15) },
+    { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA06) },
+    { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA06) },
+    { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA08) },
+    { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA10) },
+    { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA09) },
+    { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA11) },
+    { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA02) },
+    { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA03) },
+    { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA04) },
     { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA16) },
     { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA08) },
     { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA10) },
@@ -19,8 +23,10 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA19) },
     { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA22) },
     { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA23) },
-    { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PA03) },
-    { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PA05) },
+    { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA31) },
+    { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA30) },
+    { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PA02) },
+    { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PA03) },
     { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA09) },
     { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA08) },
     { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) },
diff --git a/ports/atmel-samd/common-hal/analogio/AnalogOut.c b/ports/atmel-samd/common-hal/analogio/AnalogOut.c
index fac4c6bfc..1565b0a8f 100644
--- a/ports/atmel-samd/common-hal/analogio/AnalogOut.c
+++ b/ports/atmel-samd/common-hal/analogio/AnalogOut.c
@@ -44,26 +44,36 @@
 #include "hpl/pm/hpl_pm_base.h"
 #endif
 
+#define HAVE_ANALOGOUT ( \
+    (defined(PIN_PA02) && !defined(IGNORE_PA02)) || \
+    (defined(SAM_D5X_E5X) && defined(PIN_PA05) && !defined(IGNORE_PA05)) \
+)
+
 void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self,
         const mcu_pin_obj_t *pin) {
-    #if defined(SAMD21) && !defined(PIN_PA02)
+    #if !HAVE_ANALOGOUT
     mp_raise_NotImplementedError(translate("No DAC on chip"));
     #else
-    if (pin->number != PIN_PA02
-    #ifdef SAM_D5X_E5X
-        && pin->number != PIN_PA05
+
+    int channel = -1;
+
+    #if defined(PIN_PA02) && !defined(IGNORE_PIN_PA02)
+    if (pin->number != PIN_PA02) {
+        channel = 0;
+    }
+    #endif
+    #if defined(PIN_PA05) && defined(PIN_PA05) && !defined(IGNORE_PIN_PA05)
+    if (pin->number != PIN_PA05) {
+        channel = 1;
+    }
     #endif
-    ) {
+
+    if(channel == -1) {
         mp_raise_ValueError(translate("AnalogOut not supported on given pin"));
         return;
     }
 
-    self->channel = 0;
-    #ifdef SAM_D5X_E5X
-    if (pin->number == PIN_PA05) {
-        self->channel = 1;
-    }
-    #endif
+    self->channel = channel;
 
     #ifdef SAM_D5X_E5X
     hri_mclk_set_APBDMASK_DAC_bit(MCLK);
@@ -105,11 +115,15 @@ void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self,
 }
 
 bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) {
+    #if !HAVE_ANALOGOUT
+    return false;
+    #else
     return self->deinited;
+    #endif
 }
 
 void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) {
-    #if (defined(SAMD21) && defined(PIN_PA02)) || defined(SAM_D5X_E5X)
+    #if HAVE_ANALOGOUT
     if (common_hal_analogio_analogout_deinited(self)) {
         return;
     }
@@ -130,12 +144,11 @@ void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) {
 
 void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self,
         uint16_t value) {
-    #if defined(SAMD21) && !defined(PIN_PA02)
-    return;
-    #endif
+    #if HAVE_ANALOGOUT
     // Input is 16 bit so make sure and set LEFTADJ to 1 so it takes the top
     // bits. This is currently done in asf4_conf/*/hpl_dac_config.h.
     dac_sync_write(&self->descriptor, self->channel, &value, 1);
+    #endif
 }
 
 void analogout_reset(void) {
@@ -143,7 +156,7 @@ void analogout_reset(void) {
     // if it was enabled, so do that instead if AudioOut is enabled.
 #if CIRCUITPY_AUDIOIO
     audioout_reset();
-#else
+#elif HAVE_ANALOGOUT
     #ifdef SAMD21
     while (DAC->STATUS.reg & DAC_STATUS_SYNCBUSY) {}
     #endif
diff --git a/ports/atmel-samd/common-hal/audiobusio/PDMIn.c b/ports/atmel-samd/common-hal/audiobusio/PDMIn.c
index 21474ab3b..3c9ec05c2 100644
--- a/ports/atmel-samd/common-hal/audiobusio/PDMIn.c
+++ b/ports/atmel-samd/common-hal/audiobusio/PDMIn.c
@@ -326,7 +326,7 @@ static void setup_dma(audiobusio_pdmin_obj_t* self, uint32_t length,
 // higher sample rate than specified.  Then after the audio is
 // recorded, a more expensive filter non-real-time filter could be
 // used to down-sample and low-pass.
-uint16_t sinc_filter [OVERSAMPLING] = {
+const uint16_t sinc_filter [OVERSAMPLING] = {
     0, 2, 9, 21, 39, 63, 94, 132,
     179, 236, 302, 379, 467, 565, 674, 792,
     920, 1055, 1196, 1341, 1487, 1633, 1776, 1913,
diff --git a/ports/atmel-samd/common-hal/displayio/ParallelBus.c b/ports/atmel-samd/common-hal/displayio/ParallelBus.c
index 405c08c64..f10dd2993 100644
--- a/ports/atmel-samd/common-hal/displayio/ParallelBus.c
+++ b/ports/atmel-samd/common-hal/displayio/ParallelBus.c
@@ -129,7 +129,8 @@ bool common_hal_displayio_parallelbus_begin_transaction(mp_obj_t obj) {
     return true;
 }
 
-void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byte_type, display_chip_select_behavior_t chip_select, uint8_t *data, uint32_t data_length) {
+void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byte_type,
+    display_chip_select_behavior_t chip_select, const uint8_t *data, uint32_t data_length) {
     displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj);
     common_hal_digitalio_digitalinout_set_value(&self->command, byte_type == DISPLAY_DATA);
     uint32_t* clear_write = (uint32_t*) &self->write_group->OUTCLR.reg;
diff --git a/ports/atmel-samd/common-hal/microcontroller/Pin.c b/ports/atmel-samd/common-hal/microcontroller/Pin.c
index bec9dc1e2..7dd87a3b2 100644
--- a/ports/atmel-samd/common-hal/microcontroller/Pin.c
+++ b/ports/atmel-samd/common-hal/microcontroller/Pin.c
@@ -223,9 +223,11 @@ bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t* pin) {
     #ifdef MICROPY_HW_NEOPIXEL
     if (pin == MICROPY_HW_NEOPIXEL) {
         // Special case for Metro M0 where the NeoPixel is also SWCLK
+#ifndef IGNORE_PIN_PA30
         if (MICROPY_HW_NEOPIXEL == &pin_PA30 && DSU->STATUSB.bit.DBGPRES == 1) {
             return false;
         }
+#endif
         return !neopixel_in_use;
     }
     #endif
diff --git a/ports/atmel-samd/common-hal/microcontroller/__init__.c b/ports/atmel-samd/common-hal/microcontroller/__init__.c
index 09212a0d1..50a1ec038 100644
--- a/ports/atmel-samd/common-hal/microcontroller/__init__.c
+++ b/ports/atmel-samd/common-hal/microcontroller/__init__.c
@@ -275,120 +275,119 @@ STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_PB31), MP_ROM_PTR(&pin_PB31) },
 #endif
 
-// These are SAMD51 specific so we assume we want them in RAM
-#if defined(PIN_PC00)
+#if defined(PIN_PC00) && !defined(IGNORE_PIN_PC00)
     { MP_ROM_QSTR(MP_QSTR_PC00), MP_ROM_PTR(&pin_PC00) },
 #endif
-#if defined(PIN_PC01)
+#if defined(PIN_PC01) && !defined(IGNORE_PIN_PC01)
     { MP_ROM_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_PC01) },
 #endif
-#if defined(PIN_PC02)
+#if defined(PIN_PC02) && !defined(IGNORE_PIN_PC02)
     { MP_ROM_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_PC02) },
 #endif
-#if defined(PIN_PC03)
+#if defined(PIN_PC03) && !defined(IGNORE_PIN_PC03)
     { MP_ROM_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_PC03) },
 #endif
-#if defined(PIN_PC04)
+#if defined(PIN_PC04) && !defined(IGNORE_PIN_PC04)
     { MP_ROM_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_PC04) },
 #endif
-#if defined(PIN_PC05)
+#if defined(PIN_PC05) && !defined(IGNORE_PIN_PC05)
     { MP_ROM_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_PC05) },
 #endif
-#if defined(PIN_PC06)
+#if defined(PIN_PC06) && !defined(IGNORE_PIN_PC06)
     { MP_ROM_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_PC06) },
 #endif
-#if defined(PIN_PC07)
+#if defined(PIN_PC07) && !defined(IGNORE_PIN_PC07)
     { MP_ROM_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_PC07) },
 #endif
-#if defined(PIN_PC10)
+#if defined(PIN_PC10) && !defined(IGNORE_PIN_PC10)
     { MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10) },
 #endif
-#if defined(PIN_PC11)
+#if defined(PIN_PC11) && !defined(IGNORE_PIN_PC11)
     { MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_PC11) },
 #endif
-#if defined(PIN_PC12)
+#if defined(PIN_PC12) && !defined(IGNORE_PIN_PC12)
     { MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_PC12) },
 #endif
-#if defined(PIN_PC13)
+#if defined(PIN_PC13) && !defined(IGNORE_PIN_PC13)
     { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) },
 #endif
-#if defined(PIN_PC14)
+#if defined(PIN_PC14) && !defined(IGNORE_PIN_PC14)
     { MP_ROM_QSTR(MP_QSTR_PC14), MP_ROM_PTR(&pin_PC14) },
 #endif
-#if defined(PIN_PC15)
+#if defined(PIN_PC15) && !defined(IGNORE_PIN_PC15)
     { MP_ROM_QSTR(MP_QSTR_PC15), MP_ROM_PTR(&pin_PC15) },
 #endif
-#if defined(PIN_PC16)
+#if defined(PIN_PC16) && !defined(IGNORE_PIN_PC16)
     { MP_ROM_QSTR(MP_QSTR_PC16), MP_ROM_PTR(&pin_PC16) },
 #endif
-#if defined(PIN_PC17)
+#if defined(PIN_PC17) && !defined(IGNORE_PIN_PC17)
     { MP_ROM_QSTR(MP_QSTR_PC17), MP_ROM_PTR(&pin_PC17) },
 #endif
-#if defined(PIN_PC18)
+#if defined(PIN_PC18) && !defined(IGNORE_PIN_PC18)
     { MP_ROM_QSTR(MP_QSTR_PC18), MP_ROM_PTR(&pin_PC18) },
 #endif
-#if defined(PIN_PC19)
+#if defined(PIN_PC19) && !defined(IGNORE_PIN_PC19)
     { MP_ROM_QSTR(MP_QSTR_PC19), MP_ROM_PTR(&pin_PC19) },
 #endif
-#if defined(PIN_PC20)
+#if defined(PIN_PC20) && !defined(IGNORE_PIN_PC20)
     { MP_ROM_QSTR(MP_QSTR_PC20), MP_ROM_PTR(&pin_PC20) },
 #endif
-#if defined(PIN_PC21)
+#if defined(PIN_PC21) && !defined(IGNORE_PIN_PC21)
     { MP_ROM_QSTR(MP_QSTR_PC21), MP_ROM_PTR(&pin_PC21) },
 #endif
-#if defined(PIN_PC22)
+#if defined(PIN_PC22) && !defined(IGNORE_PIN_PC22)
     { MP_ROM_QSTR(MP_QSTR_PC22), MP_ROM_PTR(&pin_PC22) },
 #endif
-#if defined(PIN_PC23)
+#if defined(PIN_PC23) && !defined(IGNORE_PIN_PC23)
     { MP_ROM_QSTR(MP_QSTR_PC23), MP_ROM_PTR(&pin_PC23) },
 #endif
-#if defined(PIN_PC24)
+#if defined(PIN_PC24) && !defined(IGNORE_PIN_PC24)
     { MP_ROM_QSTR(MP_QSTR_PC24), MP_ROM_PTR(&pin_PC24) },
 #endif
-#if defined(PIN_PC25)
+#if defined(PIN_PC25) && !defined(IGNORE_PIN_PC25)
     { MP_ROM_QSTR(MP_QSTR_PC25), MP_ROM_PTR(&pin_PC25) },
 #endif
-#if defined(PIN_PC26)
+#if defined(PIN_PC26) && !defined(IGNORE_PIN_PC26)
     { MP_ROM_QSTR(MP_QSTR_PC26), MP_ROM_PTR(&pin_PC26) },
 #endif
-#if defined(PIN_PC27)
+#if defined(PIN_PC27) && !defined(IGNORE_PIN_PC27)
     { MP_ROM_QSTR(MP_QSTR_PC27), MP_ROM_PTR(&pin_PC27) },
 #endif
-#if defined(PIN_PC28)
+#if defined(PIN_PC28) && !defined(IGNORE_PIN_PC28)
     { MP_ROM_QSTR(MP_QSTR_PC28), MP_ROM_PTR(&pin_PC28) },
 #endif
-#if defined(PIN_PC30)
+#if defined(PIN_PC30) && !defined(IGNORE_PIN_PC30)
     { MP_ROM_QSTR(MP_QSTR_PC30), MP_ROM_PTR(&pin_PC30) },
 #endif
-#if defined(PIN_PC31)
+#if defined(PIN_PC31) && !defined(IGNORE_PIN_PC31)
     { MP_ROM_QSTR(MP_QSTR_PC31), MP_ROM_PTR(&pin_PC31) },
 #endif
 
-#if defined(PIN_PD00)
+#if defined(PIN_PD00) && !defined(IGNORE_PIN_PD00)
     { MP_ROM_QSTR(MP_QSTR_PD00), MP_ROM_PTR(&pin_PD00) },
 #endif
-#if defined(PIN_PD01)
+#if defined(PIN_PD01) && !defined(IGNORE_PIN_PD01)
     { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_PD01) },
 #endif
-#if defined(PIN_PD08)
+#if defined(PIN_PD08) && !defined(IGNORE_PIN_PD08)
     { MP_ROM_QSTR(MP_QSTR_PD08), MP_ROM_PTR(&pin_PD08) },
 #endif
-#if defined(PIN_PD09)
+#if defined(PIN_PD09) && !defined(IGNORE_PIN_PD09)
     { MP_ROM_QSTR(MP_QSTR_PD09), MP_ROM_PTR(&pin_PD09) },
 #endif
-#if defined(PIN_PD10)
+#if defined(PIN_PD10) && !defined(IGNORE_PIN_PD10)
     { MP_ROM_QSTR(MP_QSTR_PD10), MP_ROM_PTR(&pin_PD10) },
 #endif
-#if defined(PIN_PD11)
+#if defined(PIN_PD11) && !defined(IGNORE_PIN_PD11)
     { MP_ROM_QSTR(MP_QSTR_PD11), MP_ROM_PTR(&pin_PD11) },
 #endif
-#if defined(PIN_PD12)
+#if defined(PIN_PD12) && !defined(IGNORE_PIN_PD12)
     { MP_ROM_QSTR(MP_QSTR_PD12), MP_ROM_PTR(&pin_PD12) },
 #endif
-#if defined(PIN_PD20)
+#if defined(PIN_PD20) && !defined(IGNORE_PIN_PD20)
     { MP_ROM_QSTR(MP_QSTR_PD20), MP_ROM_PTR(&pin_PD20) },
 #endif
-#if defined(PIN_PD21)
+#if defined(PIN_PD21) && !defined(IGNORE_PIN_PD21)
     { MP_ROM_QSTR(MP_QSTR_PD21), MP_ROM_PTR(&pin_PD21) },
 #endif
 };
diff --git a/ports/atmel-samd/mpconfigport.h b/ports/atmel-samd/mpconfigport.h
index f7ccff4da..ed10da9b9 100644
--- a/ports/atmel-samd/mpconfigport.h
+++ b/ports/atmel-samd/mpconfigport.h
@@ -47,6 +47,7 @@
 // MICROPY_PY_UJSON depends on MICROPY_PY_IO
 #define MICROPY_PY_IO                               (0)
 #define MICROPY_PY_REVERSE_SPECIAL_METHODS          (0)
+#define MICROPY_PY_UBINASCII                        (0)
 #define MICROPY_PY_UJSON                            (0)
 #define MICROPY_PY_COLLECTIONS_ORDEREDDICT          (0)
 #define MICROPY_PY_UERRNO_LIST \
diff --git a/ports/cxd56/supervisor/port.c b/ports/cxd56/supervisor/port.c
index 92d335cd5..086c2d198 100644
--- a/ports/cxd56/supervisor/port.c
+++ b/ports/cxd56/supervisor/port.c
@@ -98,8 +98,12 @@ void reset_to_bootloader(void) {
     }
 }
 
+supervisor_allocation _fixed_stack;
+
 supervisor_allocation* port_fixed_stack(void) {
-    return NULL;
+    _fixed_stack.ptr = port_stack_get_limit();
+    _fixed_stack.length = (port_stack_get_top() - port_stack_get_limit()) * sizeof(uint32_t);
+    return &_fixed_stack;
 }
 
 uint32_t *port_stack_get_limit(void) {
diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile
index 8d891edd0..55d6e91d4 100644
--- a/ports/esp32s2/Makefile
+++ b/ports/esp32s2/Makefile
@@ -188,6 +188,7 @@ SRC_C += \
 	lib/utils/pyexec.c \
 	lib/utils/stdout_helpers.c \
 	lib/utils/sys_stdio_mphal.c \
+	peripherals/pcnt.c \
 	peripherals/pins.c \
 	peripherals/rmt.c \
 	supervisor/shared/memory.c
diff --git a/ports/esp32s2/README.md b/ports/esp32s2/README.md
index 8a6dfbd2d..0738d520e 100644
--- a/ports/esp32s2/README.md
+++ b/ports/esp32s2/README.md
@@ -30,18 +30,20 @@ Connect these pins using a [USB adapter](https://www.adafruit.com/product/4090)
 
 ## Building and flashing ##
 
-Before building or flashing the ESP32-S2, you must [install the esp-idf](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/get-started/index.html). This must be re-done ever time the esp-idf is updated, but not every time you build. Run `cd ports/esp32s2` from `circuitpython/` to move to the esp32s2 port root, and run:
+Before building or flashing the ESP32-S2, you must [install the esp-idf](https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/get-started/index.html). This must be re-done every time the esp-idf is updated, but not every time you build. Run `cd ports/esp32s2` from `circuitpython/` to move to the esp32s2 port root, and run:
 
 ```
 ./esp-idf/install.sh
 ```
 
-Additionally, any time you open a new bash environment for building or flashing, you must add the esp-idf tools to your path:
+After this initial installation, you must add the esp-idf tools to your path. You must also do this **any time you open a new bash environment for building or flashing**:
 
 ```
 . esp-idf/export.sh
 ```
 
+When Circuitpython updates the ESP-IDF to a new release, you may need to run this installation process again. The exact commands used may also vary based on your bash environment.
+
 Building boards such as the Saola is typically done through `make flash`. The default port is `tty.SLAB_USBtoUART`, which will only work on certain Mac setups. On most machines, both Mac and Linux, you will need to set the port yourself by running `ls /dev/tty.usb*` and selecting the one that only appears when your development board is plugged in. An example make command with the port setting is as follows:
 
 ```
diff --git a/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/board.c b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/board.c
new file mode 100644
index 000000000..ecd44e423
--- /dev/null
+++ b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/board.c
@@ -0,0 +1,169 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "mpconfigboard.h"
+#include "shared-bindings/busio/SPI.h"
+#include "shared-bindings/displayio/FourWire.h"
+#include "shared-bindings/microcontroller/Pin.h"
+#include "shared-module/displayio/__init__.h"
+#include "supervisor/shared/board.h"
+
+#define DELAY 0x80
+
+// This is an ILO373 control chip. The display is a 2.9" grayscale EInk.
+
+const uint8_t display_start_sequence[] = {
+    0x01, 5, 0x03, 0x00, 0x2b, 0x2b, 0x13, // power setting
+    0x06, 3, 0x17, 0x17, 0x17, // booster soft start
+    0x04, DELAY, 200, // power on and wait 200 ms
+    0x00, 1, 0x7f, // panel setting
+    0x50, 1, 0x97, // CDI setting
+    0x30, 1, 0x3c, // PLL set to 50 Hx (M = 7, N = 4)
+    0x61, 3, 0x80, 0x01, 0x28, // Resolution
+    0x82, DELAY | 1, 0x12, 50, // VCM DC and delay 50ms
+
+    // Look up tables for voltage sequence for pixel transition
+    // Common voltage
+    0x20, 0x2a,
+    0x00, 0x0a, 0x00, 0x00, 0x00, 0x01,
+    0x60, 0x14, 0x14, 0x00, 0x00, 0x01,
+    0x00, 0x14, 0x00, 0x00, 0x00, 0x01,
+    0x00, 0x13, 0x0a, 0x01, 0x00, 0x01,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+    // White to white
+    0x21, 0x2a,
+    0x40, 0x0a, 0x00, 0x00, 0x00, 0x01,
+    0x90, 0x14, 0x14, 0x00, 0x00, 0x01,
+    0x10, 0x14, 0x0a, 0x00, 0x00, 0x01,
+    0xa0, 0x13, 0x01, 0x00, 0x00, 0x01,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+    // Black to white
+    0x22, 0x2a,
+    0x40, 0x0a, 0x00, 0x00, 0x00, 0x01,
+    0x90, 0x14, 0x14, 0x00, 0x00, 0x01,
+    0x00, 0x14, 0x0a, 0x00, 0x00, 0x01,
+    0x99, 0x0c, 0x01, 0x03, 0x04, 0x01,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+    // White to black
+    0x23, 0x2a,
+    0x40, 0x0a, 0x00, 0x00, 0x00, 0x01,
+    0x90, 0x14, 0x14, 0x00, 0x00, 0x01,
+    0x00, 0x14, 0x0a, 0x00, 0x00, 0x01,
+    0x99, 0x0b, 0x04, 0x04, 0x01, 0x01,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+    // Black to black
+    0x24, 0x2a,
+    0x80, 0x0a, 0x00, 0x00, 0x00, 0x01,
+    0x90, 0x14, 0x14, 0x00, 0x00, 0x01,
+    0x20, 0x14, 0x0a, 0x00, 0x00, 0x01,
+    0x50, 0x13, 0x01, 0x00, 0x00, 0x01,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+const uint8_t display_stop_sequence[] = {
+    0x50, 0x01, 0x17,  // CDI Setting
+    0x82, 0x01, 0x00,  // VCM DC to -0.1V
+    0x02, 0x00  // Power off
+};
+
+void board_init(void) {
+    // USB
+    common_hal_never_reset_pin(&pin_GPIO19);
+    common_hal_never_reset_pin(&pin_GPIO20);
+
+    // Debug UART
+    common_hal_never_reset_pin(&pin_GPIO43);
+    common_hal_never_reset_pin(&pin_GPIO44);
+
+    busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus;
+    common_hal_busio_spi_construct(spi, &pin_GPIO36, &pin_GPIO35, NULL);
+    common_hal_busio_spi_never_reset(spi);
+
+    displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus;
+    bus->base.type = &displayio_fourwire_type;
+    common_hal_displayio_fourwire_construct(bus,
+        spi,
+        &pin_GPIO7, // EPD_DC Command or data
+        &pin_GPIO8, // EPD_CS Chip select
+        &pin_GPIO6, // EPD_RST Reset
+        4000000, // Baudrate
+        0, // Polarity
+        0); // Phase
+
+    displayio_epaperdisplay_obj_t* display = &displays[0].epaper_display;
+    display->base.type = &displayio_epaperdisplay_type;
+    common_hal_displayio_epaperdisplay_construct(
+        display,
+        bus,
+        display_start_sequence, sizeof(display_start_sequence),
+        display_stop_sequence, sizeof(display_stop_sequence),
+        296,  // width
+        128,  // height
+        160,  // ram_width
+        296,  // ram_height
+        0,  // colstart
+        0,  // rowstart
+        270,  // rotation
+        NO_COMMAND,  // set_column_window_command
+        NO_COMMAND,  // set_row_window_command
+        NO_COMMAND,  // set_current_column_command
+        NO_COMMAND,  // set_current_row_command
+        0x10,  // write_black_ram_command
+        false,  // black_bits_inverted
+        0x13,  // write_color_ram_command
+        false,  // color_bits_inverted
+        0x000000,  // highlight_color
+        0x12,  // refresh_display_command
+        1.0,  // refresh_time
+        &pin_GPIO5,  // busy_pin
+        false,  // busy_state
+        5.0, // seconds_per_frame
+        false,  // always_toggle_chip_select
+        true);  // grayscale
+}
+
+bool board_requests_safe_mode(void) {
+    return false;
+}
+
+void reset_board(void) {
+
+}
diff --git a/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/mpconfigboard.h b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/mpconfigboard.h
new file mode 100644
index 000000000..be376e5a9
--- /dev/null
+++ b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/mpconfigboard.h
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+//Micropython setup
+
+#define MICROPY_HW_BOARD_NAME       "MagTag"
+#define MICROPY_HW_MCU_NAME         "ESP32S2"
+
+#define MICROPY_HW_NEOPIXEL (&pin_GPIO1)
+
+#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
+
+#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
+
+#define AUTORESET_DELAY_MS 500
+
+#define DEFAULT_I2C_BUS_SCL (&pin_GPIO34)
+#define DEFAULT_I2C_BUS_SDA (&pin_GPIO33)
+
+#define DEFAULT_SPI_BUS_SCK (&pin_GPIO36)
+#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO35)
+#define DEFAULT_SPI_BUS_MISO (&pin_GPIO37)
diff --git a/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/mpconfigboard.mk b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/mpconfigboard.mk
new file mode 100644
index 000000000..0a141cbe3
--- /dev/null
+++ b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/mpconfigboard.mk
@@ -0,0 +1,17 @@
+USB_VID = 0x239A
+USB_PID = 0x80E6
+USB_PRODUCT = "MagTag"
+USB_MANUFACTURER = "Adafruit"
+
+INTERNAL_FLASH_FILESYSTEM = 1
+LONGINT_IMPL = MPZ
+
+# The default queue depth of 16 overflows on release builds,
+# so increase it to 32.
+CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
+
+CIRCUITPY_ESP_FLASH_MODE=dio
+CIRCUITPY_ESP_FLASH_FREQ=40m
+CIRCUITPY_ESP_FLASH_SIZE=4MB
+
+CIRCUITPY_MODULE=wrover
diff --git a/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c
new file mode 100644
index 000000000..40c9e91e4
--- /dev/null
+++ b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c
@@ -0,0 +1,45 @@
+#include "shared-bindings/board/__init__.h"
+
+#include "shared-module/displayio/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+    { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO10) },
+    { MP_ROM_QSTR(MP_QSTR_AD1), MP_ROM_PTR(&pin_GPIO18) },
+    { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO13) },
+
+    { MP_ROM_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_GPIO17) },
+    { MP_ROM_QSTR(MP_QSTR_SPEAKER_ENABLE), MP_ROM_PTR(&pin_GPIO16) },
+
+    { MP_ROM_QSTR(MP_QSTR_EPD_BUSY), MP_ROM_PTR(&pin_GPIO5) },
+    { MP_ROM_QSTR(MP_QSTR_EPD_RESET), MP_ROM_PTR(&pin_GPIO6) },
+    { MP_ROM_QSTR(MP_QSTR_EPD_DC), MP_ROM_PTR(&pin_GPIO7) },
+    { MP_ROM_QSTR(MP_QSTR_EPD_CS), MP_ROM_PTR(&pin_GPIO8) },
+
+    { MP_ROM_QSTR(MP_QSTR_BUTTON_A), MP_ROM_PTR(&pin_GPIO15) },
+    { MP_ROM_QSTR(MP_QSTR_BUTTON_B), MP_ROM_PTR(&pin_GPIO14) },
+    { MP_ROM_QSTR(MP_QSTR_BUTTON_C), MP_ROM_PTR(&pin_GPIO12) },
+    { MP_ROM_QSTR(MP_QSTR_BUTTON_D), MP_ROM_PTR(&pin_GPIO11) },
+
+    { MP_ROM_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_GPIO3) },
+
+    { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_GPIO4) },
+    { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_GPIO4) },
+
+    { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO33) },
+    { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO34) },
+
+    { MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_GPIO8) },
+    { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO35) },
+    { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) },
+    { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO37) },
+
+    { MP_ROM_QSTR(MP_QSTR_NEOPIXEL_POWER), MP_ROM_PTR(&pin_GPIO21) },
+
+    { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO1) },
+
+    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
+    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
+
+    { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].epaper_display)}
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/sdkconfig b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/sdkconfig
new file mode 100644
index 000000000..9d8bbde96
--- /dev/null
+++ b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/sdkconfig
@@ -0,0 +1,33 @@
+CONFIG_ESP32S2_SPIRAM_SUPPORT=y
+
+#
+# SPI RAM config
+#
+# CONFIG_SPIRAM_TYPE_AUTO is not set
+CONFIG_SPIRAM_TYPE_ESPPSRAM16=y
+# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
+# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
+CONFIG_SPIRAM_SIZE=2097152
+
+#
+# PSRAM clock and cs IO for ESP32S2
+#
+CONFIG_DEFAULT_PSRAM_CLK_IO=30
+CONFIG_DEFAULT_PSRAM_CS_IO=26
+# end of PSRAM clock and cs IO for ESP32S2
+
+# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set
+# CONFIG_SPIRAM_RODATA is not set
+# CONFIG_SPIRAM_SPEED_80M is not set
+CONFIG_SPIRAM_SPEED_40M=y
+# CONFIG_SPIRAM_SPEED_26M is not set
+# CONFIG_SPIRAM_SPEED_20M is not set
+CONFIG_SPIRAM=y
+CONFIG_SPIRAM_BOOT_INIT=y
+# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set
+CONFIG_SPIRAM_USE_MEMMAP=y
+# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set
+# CONFIG_SPIRAM_USE_MALLOC is not set
+CONFIG_SPIRAM_MEMTEST=y
+# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set
+# end of SPI RAM config
diff --git a/ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c b/ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c
index 08d2b2a1a..dbd6cfef8 100644
--- a/ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c
+++ b/ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c
@@ -2,41 +2,65 @@
 
 STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
     { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO17) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },
+
     { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO18) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },
+
     { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO1) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) },
+
     { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO2) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) },
+
     { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO3) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
+
     { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO4) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
 
-    { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO5) },
     { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO5) },
-    { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO6) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
+
     { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO6) },
-    { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO7) },
-    { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO8) },
-    { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO9) },
-    { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO10) },
-    { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO11) },
-    { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO12) },
-    { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO13) },
-    { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO14) },
-    { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO15) },
-    { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO16) },
-    { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO21) },
-    { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO42) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
+
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },
 
     { MP_OBJ_NEW_QSTR(MP_QSTR_SDA),MP_ROM_PTR(&pin_GPIO33) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO33),MP_ROM_PTR(&pin_GPIO33) },
+
     { MP_OBJ_NEW_QSTR(MP_QSTR_SCL),MP_ROM_PTR(&pin_GPIO34) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO34),MP_ROM_PTR(&pin_GPIO34) },
+
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },
+
+    { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI),MP_ROM_PTR(&pin_GPIO35) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO35),MP_ROM_PTR(&pin_GPIO35) },
+
+    { MP_OBJ_NEW_QSTR(MP_QSTR_MISO),MP_ROM_PTR(&pin_GPIO37) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO37),MP_ROM_PTR(&pin_GPIO37) },
+
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO42) },
 
     { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO45) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) },
 
     { MP_OBJ_NEW_QSTR(MP_QSTR_DEBUG_RX), MP_ROM_PTR(&pin_GPIO38) },
     { MP_OBJ_NEW_QSTR(MP_QSTR_DEBUG_TX), MP_ROM_PTR(&pin_GPIO37) },
 
-    { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) },
-    { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI),MP_ROM_PTR(&pin_GPIO35) },
-    { MP_OBJ_NEW_QSTR(MP_QSTR_MISO),MP_ROM_PTR(&pin_GPIO37) },
-
     { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
     { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
     { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
diff --git a/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.mk b/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.mk
index ba85e46ef..2dce03881 100644
--- a/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.mk
+++ b/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.mk
@@ -11,7 +11,7 @@ LONGINT_IMPL = MPZ
 CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
 
 CIRCUITPY_ESP_FLASH_MODE=dio
-CIRCUITPY_ESP_FLASH_FREQ=40m
+CIRCUITPY_ESP_FLASH_FREQ=80m
 CIRCUITPY_ESP_FLASH_SIZE=4MB
 
 CIRCUITPY_MODULE=wrover
diff --git a/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h b/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h
index b87b5dfa0..272ab20fa 100644
--- a/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h
+++ b/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h
@@ -25,7 +25,6 @@
  */
 
 //Micropython setup
-
 #define MICROPY_HW_BOARD_NAME       "microS2"
 #define MICROPY_HW_MCU_NAME         "ESP32S2"
 
@@ -33,8 +32,20 @@
 #define MICROPY_HW_BUTTON (&pin_GPIO0)
 #define MICROPY_HW_NEOPIXEL (&pin_GPIO33)
 
+// Default bus pins
+#define DEFAULT_I2C_BUS_SCL (&pin_GPIO1)
+#define DEFAULT_I2C_BUS_SDA (&pin_GPIO2)
+
+#define DEFAULT_SPI_BUS_SCK (&pin_GPIO36)
+#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO35)
+#define DEFAULT_SPI_BUS_MISO (&pin_GPIO37)
+
+#define DEFAULT_UART_BUS_TX (&pin_GPIO43)
+#define DEFAULT_UART_BUS_RX (&pin_GPIO44)
+
 #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
 
+// Explanation of how a user got into safe mode.
 #define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
 
 #define AUTORESET_DELAY_MS 500
diff --git a/ports/esp32s2/boards/targett_module_clip_wroom/board.c b/ports/esp32s2/boards/targett_module_clip_wroom/board.c
new file mode 100644
index 000000000..7f5de0e0d
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wroom/board.c
@@ -0,0 +1,51 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "mpconfigboard.h"
+#include "shared-bindings/microcontroller/Pin.h"
+
+void board_init(void) {
+    // USB
+    common_hal_never_reset_pin(&pin_GPIO19);
+    common_hal_never_reset_pin(&pin_GPIO20);
+
+    // Debug UART
+    common_hal_never_reset_pin(&pin_GPIO43);
+    common_hal_never_reset_pin(&pin_GPIO44);
+
+    // Crystal
+    common_hal_never_reset_pin(&pin_GPIO15);
+    common_hal_never_reset_pin(&pin_GPIO16);
+}
+
+bool board_requests_safe_mode(void) {
+    return false;
+}
+
+void reset_board(void) {
+
+}
diff --git a/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.h b/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.h
new file mode 100644
index 000000000..6cf69138e
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.h
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+//Micropython setup
+
+//Essentially the same as the Saola board but without the neopixel
+
+#define MICROPY_HW_BOARD_NAME       "Targett Module Clip w/Wroom"
+#define MICROPY_HW_MCU_NAME         "ESP32S2"
+
+//#define MICROPY_HW_NEOPIXEL (&pin_GPIO18)
+
+#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
+
+#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
+
+#define AUTORESET_DELAY_MS 500
diff --git a/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk b/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk
new file mode 100644
index 000000000..f88cb75d2
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk
@@ -0,0 +1,17 @@
+USB_VID = 0x1209
+USB_PID = 0x3252
+USB_PRODUCT = "Targett Module Clip w/Wroom"
+USB_MANUFACTURER = "Targett"
+
+INTERNAL_FLASH_FILESYSTEM = 1
+LONGINT_IMPL = MPZ
+
+# The default queue depth of 16 overflows on release builds,
+# so increase it to 32.
+CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
+
+CIRCUITPY_ESP_FLASH_MODE=dio
+CIRCUITPY_ESP_FLASH_FREQ=40m
+CIRCUITPY_ESP_FLASH_SIZE=4MB
+
+CIRCUITPY_MODULE=wroom
diff --git a/ports/esp32s2/boards/targett_module_clip_wroom/pins.c b/ports/esp32s2/boards/targett_module_clip_wroom/pins.c
new file mode 100644
index 000000000..99db09645
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wroom/pins.c
@@ -0,0 +1,48 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+    { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) },
+    { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) },
+    { MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) },
+    { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
+    { MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
+    { MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
+    { MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
+    { MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
+    { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
+    { MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) },
+    { MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) },
+    { MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) },
+    { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) },
+    { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
+    { MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) },
+    { MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) },
+    { MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) },
+    { MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },
+
+
+    { MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },
+    { MP_ROM_QSTR(MP_QSTR_IO19), MP_ROM_PTR(&pin_GPIO19) },
+    { MP_ROM_QSTR(MP_QSTR_IO20), MP_ROM_PTR(&pin_GPIO20) },
+    { MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },
+    { MP_ROM_QSTR(MP_QSTR_IO26), MP_ROM_PTR(&pin_GPIO26) },
+    { MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) },
+    { MP_ROM_QSTR(MP_QSTR_IO34), MP_ROM_PTR(&pin_GPIO34) },
+    { MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) },
+    { MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },
+    { MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) },
+    { MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) },
+    { MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_GPIO39) },
+    { MP_ROM_QSTR(MP_QSTR_IO40), MP_ROM_PTR(&pin_GPIO40) },
+    { MP_ROM_QSTR(MP_QSTR_IO41), MP_ROM_PTR(&pin_GPIO41) },
+    { MP_ROM_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) },
+    { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
+    { MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) },
+    { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
+    { MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) },
+    { MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) },
+    { MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) },
+
+    //{ MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO18) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/esp32s2/boards/targett_module_clip_wroom/sdkconfig b/ports/esp32s2/boards/targett_module_clip_wroom/sdkconfig
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wroom/sdkconfig
diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/board.c b/ports/esp32s2/boards/targett_module_clip_wrover/board.c
new file mode 100644
index 000000000..83dcb920a
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wrover/board.c
@@ -0,0 +1,51 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "mpconfigboard.h"
+#include "shared-bindings/microcontroller/Pin.h"
+
+void board_init(void) {
+    // USB
+    common_hal_never_reset_pin(&pin_GPIO19);
+    common_hal_never_reset_pin(&pin_GPIO20);
+
+    // Debug UART
+    common_hal_never_reset_pin(&pin_GPIO43);
+    common_hal_never_reset_pin(&pin_GPIO44);
+
+    //Crystal
+    common_hal_never_reset_pin(&pin_GPIO15);
+    common_hal_never_reset_pin(&pin_GPIO16);
+}
+
+bool board_requests_safe_mode(void) {
+    return false;
+}
+
+void reset_board(void) {
+
+}
diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.h b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.h
new file mode 100644
index 000000000..3c74d27fa
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.h
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+//Micropython setup
+
+//Same setup as the Saola board but with no Neopixel on board
+
+#define MICROPY_HW_BOARD_NAME       "Targett Module Clip w/Wrover"
+#define MICROPY_HW_MCU_NAME         "ESP32S2"
+
+//#define MICROPY_HW_NEOPIXEL (&pin_GPIO18)
+
+#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
+
+#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
+
+#define AUTORESET_DELAY_MS 500
diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk
new file mode 100644
index 000000000..e2dc15584
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk
@@ -0,0 +1,17 @@
+USB_VID = 0x1209
+USB_PID = 0x3253
+USB_PRODUCT = "Targett Module Clip w/Wrover"
+USB_MANUFACTURER = "Targett"
+
+INTERNAL_FLASH_FILESYSTEM = 1
+LONGINT_IMPL = MPZ
+
+# The default queue depth of 16 overflows on release builds,
+# so increase it to 32.
+CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
+
+CIRCUITPY_ESP_FLASH_MODE=dio
+CIRCUITPY_ESP_FLASH_FREQ=40m
+CIRCUITPY_ESP_FLASH_SIZE=4MB
+
+CIRCUITPY_MODULE=wrover
diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/pins.c b/ports/esp32s2/boards/targett_module_clip_wrover/pins.c
new file mode 100644
index 000000000..99db09645
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wrover/pins.c
@@ -0,0 +1,48 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+    { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) },
+    { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) },
+    { MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) },
+    { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
+    { MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
+    { MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
+    { MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
+    { MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
+    { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
+    { MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) },
+    { MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) },
+    { MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) },
+    { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) },
+    { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
+    { MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) },
+    { MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) },
+    { MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) },
+    { MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },
+
+
+    { MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },
+    { MP_ROM_QSTR(MP_QSTR_IO19), MP_ROM_PTR(&pin_GPIO19) },
+    { MP_ROM_QSTR(MP_QSTR_IO20), MP_ROM_PTR(&pin_GPIO20) },
+    { MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },
+    { MP_ROM_QSTR(MP_QSTR_IO26), MP_ROM_PTR(&pin_GPIO26) },
+    { MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) },
+    { MP_ROM_QSTR(MP_QSTR_IO34), MP_ROM_PTR(&pin_GPIO34) },
+    { MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) },
+    { MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },
+    { MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) },
+    { MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) },
+    { MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_GPIO39) },
+    { MP_ROM_QSTR(MP_QSTR_IO40), MP_ROM_PTR(&pin_GPIO40) },
+    { MP_ROM_QSTR(MP_QSTR_IO41), MP_ROM_PTR(&pin_GPIO41) },
+    { MP_ROM_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) },
+    { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
+    { MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) },
+    { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
+    { MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) },
+    { MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) },
+    { MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) },
+
+    //{ MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO18) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/sdkconfig b/ports/esp32s2/boards/targett_module_clip_wrover/sdkconfig
new file mode 100644
index 000000000..9d8bbde96
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wrover/sdkconfig
@@ -0,0 +1,33 @@
+CONFIG_ESP32S2_SPIRAM_SUPPORT=y
+
+#
+# SPI RAM config
+#
+# CONFIG_SPIRAM_TYPE_AUTO is not set
+CONFIG_SPIRAM_TYPE_ESPPSRAM16=y
+# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
+# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
+CONFIG_SPIRAM_SIZE=2097152
+
+#
+# PSRAM clock and cs IO for ESP32S2
+#
+CONFIG_DEFAULT_PSRAM_CLK_IO=30
+CONFIG_DEFAULT_PSRAM_CS_IO=26
+# end of PSRAM clock and cs IO for ESP32S2
+
+# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set
+# CONFIG_SPIRAM_RODATA is not set
+# CONFIG_SPIRAM_SPEED_80M is not set
+CONFIG_SPIRAM_SPEED_40M=y
+# CONFIG_SPIRAM_SPEED_26M is not set
+# CONFIG_SPIRAM_SPEED_20M is not set
+CONFIG_SPIRAM=y
+CONFIG_SPIRAM_BOOT_INIT=y
+# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set
+CONFIG_SPIRAM_USE_MEMMAP=y
+# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set
+# CONFIG_SPIRAM_USE_MALLOC is not set
+CONFIG_SPIRAM_MEMTEST=y
+# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set
+# end of SPI RAM config
diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h
index 5a885f29c..b68a31b9e 100644
--- a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h
+++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h
@@ -37,3 +37,13 @@
 
 // #define MICROPY_HW_APA102_MOSI   (&pin_GPIO40)
 // #define MICROPY_HW_APA102_SCK    (&pin_GPIO45)
+
+#define DEFAULT_I2C_BUS_SCL (&pin_GPIO9)
+#define DEFAULT_I2C_BUS_SDA (&pin_GPIO8)
+
+#define DEFAULT_SPI_BUS_SCK (&pin_GPIO36)
+#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO35)
+#define DEFAULT_SPI_BUS_MISO (&pin_GPIO37)
+
+#define DEFAULT_UART_BUS_RX (&pin_GPIO44)
+#define DEFAULT_UART_BUS_TX (&pin_GPIO43)
diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c
index 967f5e8d9..a1036f850 100644
--- a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c
+++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c
@@ -46,11 +46,11 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO43) },
     { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
 
-    { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO38) },
+    { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO38) },
     { MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) },
     { MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_GPIO38) },
 
-    { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO33) },
+    { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO33) },
     { MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) },
     { MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_GPIO33) },
 
diff --git a/ports/esp32s2/common-hal/busio/SPI.c b/ports/esp32s2/common-hal/busio/SPI.c
index 1906ca6f0..490419f34 100644
--- a/ports/esp32s2/common-hal/busio/SPI.c
+++ b/ports/esp32s2/common-hal/busio/SPI.c
@@ -357,6 +357,9 @@ bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_ou
     } else {
         hal->dma_enabled = 0;
         burst_length = sizeof(hal->hw->data_buf);
+        // When switching to non-DMA, we need to make sure DMA is off. Otherwise,
+        // the S2 will transmit zeroes instead of our data.
+        spi_ll_txdma_disable(hal->hw);
     }
 
     // This rounds up.
diff --git a/ports/esp32s2/common-hal/canio/CAN.c b/ports/esp32s2/common-hal/canio/CAN.c
new file mode 100644
index 000000000..768fde243
--- /dev/null
+++ b/ports/esp32s2/common-hal/canio/CAN.c
@@ -0,0 +1,295 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jeff Epler for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <string.h>
+
+#include "py/runtime.h"
+#include "py/mperrno.h"
+
+#include "common-hal/canio/CAN.h"
+#include "shared-bindings/microcontroller/Pin.h"
+#include "shared-bindings/util.h"
+#include "supervisor/port.h"
+
+#include "hal/twai_types.h"
+
+STATIC bool reserved_can;
+
+twai_timing_config_t get_t_config(int baudrate) {
+    switch(baudrate) {
+    case 1000000:
+    {
+        // TWAI_TIMING_CONFIG_abc expands to a C designated initializer list
+        // { .brp = 4, ...}.  This is only acceptable to the compiler as an
+        // initializer and 'return TWAI_TIMING_CONFIG_1MBITS()` is not valid.
+        // Instead, introduce a temporary, named variable and return it.
+        twai_timing_config_t t_config = TWAI_TIMING_CONFIG_1MBITS();
+        return t_config;
+    }
+    case 800000:
+    {
+        twai_timing_config_t t_config = TWAI_TIMING_CONFIG_800KBITS();
+        return t_config;
+    }
+    case 500000:
+    {
+        twai_timing_config_t t_config = TWAI_TIMING_CONFIG_500KBITS();
+        return t_config;
+    }
+    case 250000:
+    {
+        twai_timing_config_t t_config = TWAI_TIMING_CONFIG_250KBITS();
+        return t_config;
+    }
+    case 125000:
+    {
+        twai_timing_config_t t_config = TWAI_TIMING_CONFIG_125KBITS();
+        return t_config;
+    }
+    case 100000:
+    {
+        twai_timing_config_t t_config = TWAI_TIMING_CONFIG_100KBITS();
+        return t_config;
+    }
+    case 50000:
+    {
+        twai_timing_config_t t_config = TWAI_TIMING_CONFIG_50KBITS();
+        return t_config;
+    }
+    case 25000:
+    {
+        twai_timing_config_t t_config = TWAI_TIMING_CONFIG_25KBITS();
+        return t_config;
+    }
+    case 20000:
+    {
+        twai_timing_config_t t_config = TWAI_TIMING_CONFIG_20KBITS();
+        return t_config;
+    }
+    case 16000:
+    {
+        twai_timing_config_t t_config = TWAI_TIMING_CONFIG_16KBITS();
+        return t_config;
+    }
+    case 12500:
+    {
+        twai_timing_config_t t_config = TWAI_TIMING_CONFIG_12_5KBITS();
+        return t_config;
+    }
+    case 10000:
+    {
+        twai_timing_config_t t_config = TWAI_TIMING_CONFIG_10KBITS();
+        return t_config;
+    }
+    case 5000:
+    {
+        twai_timing_config_t t_config = TWAI_TIMING_CONFIG_5KBITS();
+        return t_config;
+    }
+    case 1000:
+    {
+        twai_timing_config_t t_config = TWAI_TIMING_CONFIG_1KBITS();
+        return t_config;
+    }
+    default:
+        mp_raise_ValueError(translate("Baudrate not supported by peripheral"));
+    }
+}
+
+void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mcu_pin_obj_t *rx, int baudrate, bool loopback, bool silent)
+{
+#define DIV_ROUND(a, b) (((a) + (b)/2) / (b))
+#define DIV_ROUND_UP(a, b) (((a) + (b) - 1) / (b))
+    if (reserved_can) {
+        mp_raise_ValueError(translate("All CAN peripherals are in use"));
+    }
+
+    if (loopback && silent) {
+        mp_raise_ValueError(translate("loopback + silent mode not supported by peripheral"));
+    }
+
+    twai_timing_config_t t_config = get_t_config(baudrate);
+    twai_general_config_t g_config = TWAI_GENERAL_CONFIG_DEFAULT(-1, -1, TWAI_MODE_NORMAL);
+    g_config.tx_io = tx->number;
+    g_config.rx_io = rx->number;
+    if (loopback) {
+        g_config.mode = TWAI_MODE_NO_ACK;
+    }
+    if (silent) {
+        g_config.mode = TWAI_MODE_LISTEN_ONLY;
+    }
+
+    twai_filter_config_t f_config = TWAI_FILTER_CONFIG_ACCEPT_ALL();
+
+    esp_err_t result = twai_driver_install(&g_config, &t_config, &f_config);
+    if (result == ESP_ERR_NO_MEM) {
+        mp_raise_msg(&mp_type_MemoryError, translate("ESP-IDF memory allocation failed"));
+    } else if (result == ESP_ERR_INVALID_ARG) {
+        mp_raise_ValueError(translate("Invalid pins"));
+    } else if (result != ESP_OK) {
+        mp_raise_OSError_msg_varg(translate("twai_driver_install returned esp-idf error #%d"), (int)result);
+    }
+
+    result = twai_start();
+    if (result != ESP_OK) {
+        mp_raise_OSError_msg_varg(translate("twai_start returned esp-idf error #%d"), (int)result);
+    }
+
+    self->silent = silent;
+    self->loopback = loopback;
+    self->baudrate = baudrate;
+    self->tx_pin = tx;
+    self->rx_pin = rx;
+
+    claim_pin(tx);
+    claim_pin(rx);
+
+    reserved_can = true;
+}
+
+bool common_hal_canio_can_loopback_get(canio_can_obj_t *self)
+{
+    return self->loopback;
+}
+
+int common_hal_canio_can_baudrate_get(canio_can_obj_t *self)
+{
+    return self->baudrate;
+}
+
+int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self)
+{
+    twai_status_info_t info;
+    twai_get_status_info(&info);
+    return info.tx_error_counter;
+}
+
+int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self)
+{
+    twai_status_info_t info;
+    twai_get_status_info(&info);
+    return info.rx_error_counter;
+}
+
+canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self) {
+    twai_status_info_t info;
+    twai_get_status_info(&info);
+    if (info.state == TWAI_STATE_BUS_OFF || info.state == TWAI_STATE_RECOVERING) {
+        return BUS_STATE_OFF;
+    }
+    if (info.tx_error_counter > 127 || info.rx_error_counter > 127) {
+        return BUS_STATE_ERROR_PASSIVE;
+    }
+    if (info.tx_error_counter > 96 || info.rx_error_counter > 96) {
+        return BUS_STATE_ERROR_WARNING;
+    }
+    return BUS_STATE_ERROR_ACTIVE;
+}
+
+static void can_restart(void) {
+    twai_status_info_t info;
+    twai_get_status_info(&info);
+    if (info.state != TWAI_STATE_BUS_OFF) {
+        return;
+    }
+    twai_initiate_recovery();
+    // wait 100ms (hard coded for now) for bus to recover
+    uint64_t deadline = port_get_raw_ticks(NULL) + 100;
+    do {
+        twai_get_status_info(&info);
+    } while (port_get_raw_ticks(NULL) < deadline && (info.state == TWAI_STATE_BUS_OFF || info.state == TWAI_STATE_RECOVERING));
+}
+
+void canio_maybe_auto_restart(canio_can_obj_t *self) {
+    if (self->auto_restart) can_restart();
+}
+
+void common_hal_canio_can_restart(canio_can_obj_t *self) {
+    if (!common_hal_canio_can_auto_restart_get(self)) {
+        can_restart();
+    }
+}
+
+bool common_hal_canio_can_auto_restart_get(canio_can_obj_t *self) {
+    return self->auto_restart;
+}
+
+void common_hal_canio_can_auto_restart_set(canio_can_obj_t *self, bool value) {
+    self->auto_restart = value;
+    canio_maybe_auto_restart(self);
+}
+
+void common_hal_canio_can_send(canio_can_obj_t *self, mp_obj_t message_in)
+{
+    canio_maybe_auto_restart(self);
+    canio_message_obj_t *message = message_in;
+    bool rtr = message->base.type == &canio_remote_transmission_request_type;
+    twai_message_t message_out = {
+        .extd = message->extended,
+        .rtr = rtr,
+        .self = self->loopback,
+        .identifier = message->id,
+        .data_length_code = message->size,
+    };
+    if (!rtr) {
+        memcpy(message_out.data, message->data, message->size);
+    }
+    // Allow transmission to occur in background
+    twai_transmit(&message_out, 0);
+}
+
+bool common_hal_canio_can_silent_get(canio_can_obj_t *self) {
+    return self->silent;
+}
+
+bool common_hal_canio_can_deinited(canio_can_obj_t *self) {
+    return !self->tx_pin;
+}
+
+void common_hal_canio_can_check_for_deinit(canio_can_obj_t *self) {
+    if (common_hal_canio_can_deinited(self)) {
+        raise_deinited_error();
+    }
+}
+
+void common_hal_canio_can_deinit(canio_can_obj_t *self)
+{
+    if (self->tx_pin) {
+        (void)twai_stop();
+        (void)twai_driver_uninstall();
+        reset_pin_number(self->tx_pin->number);
+        reset_pin_number(self->rx_pin->number);
+        reserved_can = false;
+    }
+    self->tx_pin = NULL;
+    self->rx_pin = NULL;
+}
+
+void common_hal_canio_reset(void) {
+    (void)twai_stop();
+    (void)twai_driver_uninstall();
+    reserved_can = false;
+}
diff --git a/ports/esp32s2/common-hal/canio/CAN.h b/ports/esp32s2/common-hal/canio/CAN.h
new file mode 100644
index 000000000..85fb6972b
--- /dev/null
+++ b/ports/esp32s2/common-hal/canio/CAN.h
@@ -0,0 +1,49 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jeff Epler for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#pragma once
+
+#include "py/obj.h"
+#include "shared-bindings/canio/__init__.h"
+#include "shared-bindings/canio/CAN.h"
+#include "common-hal/microcontroller/Pin.h"
+#include "common-hal/canio/__init__.h"
+#include "shared-module/canio/Message.h"
+
+#include "driver/twai.h"
+
+#define FILTER_BANK_COUNT (28)
+
+typedef struct canio_can_obj {
+    mp_obj_base_t base;
+    int baudrate;
+    const mcu_pin_obj_t *rx_pin;
+    const mcu_pin_obj_t *tx_pin;
+    bool loopback:1;
+    bool silent:1;
+    bool auto_restart:1;
+    bool fifo_in_use:1;
+} canio_can_obj_t;
diff --git a/ports/esp32s2/common-hal/canio/Listener.c b/ports/esp32s2/common-hal/canio/Listener.c
new file mode 100644
index 000000000..fddbfeb58
--- /dev/null
+++ b/ports/esp32s2/common-hal/canio/Listener.c
@@ -0,0 +1,182 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jeff Epler for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <math.h>
+#include <string.h>
+
+#include "py/obj.h"
+#include "py/runtime.h"
+
+#include "common-hal/canio/__init__.h"
+#include "common-hal/canio/Listener.h"
+#include "shared-bindings/canio/Listener.h"
+#include "shared-bindings/util.h"
+#include "supervisor/shared/tick.h"
+#include "supervisor/shared/safe_mode.h"
+
+#include "hal/twai_ll.h"
+
+// IDE = "extended ID" flag of packet header.  We always add this bit to the
+// mask because a match is always for just one kind of address length
+#define FILTER16_IDE (1<<3)
+#define FILTER32_IDE (1<<2)
+
+// Work around a problem reported at
+// https://github.com/espressif/esp-idf/issues/6020 where
+// twai_ll_set_acc_filter does not work under -Os optimization
+__attribute__((optimize("O0")))
+__attribute__((noinline))
+static void canio_set_acc_filter(twai_dev_t* hw, uint32_t code, uint32_t mask, bool single_filter)
+{
+    uint32_t code_swapped = __builtin_bswap32(code);
+    uint32_t mask_swapped = __builtin_bswap32(mask);
+    for (int i = 0; i < 4; i++) {
+        hw->acceptance_filter.acr[i].val = ((code_swapped >> (i * 8)) & 0xFF);
+        hw->acceptance_filter.amr[i].val = ((mask_swapped >> (i * 8)) & 0xFF);
+    }
+    hw->mode_reg.afm = single_filter;
+}
+
+STATIC void install_standard_filter(canio_listener_obj_t *self, canio_match_obj_t *match) {
+    canio_set_acc_filter(&TWAI, match->id << 21, ~(match->mask << 21), true);
+    self->extended = false;
+    self->standard = true;
+}
+
+STATIC void install_extended_filter(canio_listener_obj_t *self, canio_match_obj_t *match) {
+    canio_set_acc_filter(&TWAI, match->id << 3, ~(match->mask << 3), true);
+    self->extended = true;
+    self->standard = false;
+}
+
+STATIC void install_all_match_filter(canio_listener_obj_t *self) {
+    canio_set_acc_filter(&TWAI, 0u, ~0u, true);
+    self->extended = true;
+    self->standard = true;
+}
+
+__attribute__((noinline,optimize("O0")))
+void set_filters(canio_listener_obj_t *self, size_t nmatch, canio_match_obj_t **matches) {
+    twai_ll_enter_reset_mode(&TWAI);
+
+    if (!nmatch) {
+        install_all_match_filter(self);
+    } else {
+        canio_match_obj_t *match = matches[0];
+        if (match->extended) {
+            install_extended_filter(self, match);
+        } else {
+            install_standard_filter(self, match);
+        }
+    }
+
+    twai_ll_exit_reset_mode(&TWAI);
+}
+
+
+void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout) {
+    if (can->fifo_in_use) {
+        mp_raise_ValueError(translate("All RX FIFOs in use"));
+    }
+    if (nmatch > 1) {
+        mp_raise_ValueError(translate("Filters too complex"));
+    }
+
+    // Nothing can fail now so it's safe to assign self->can
+    can->fifo_in_use = 1;
+    self->can = can;
+    self->pending = false;
+
+    set_filters(self, nmatch, matches);
+    self->extended = self->standard = true;
+
+    common_hal_canio_listener_set_timeout(self, timeout);
+}
+
+void common_hal_canio_listener_set_timeout(canio_listener_obj_t *self, float timeout) {
+    self->timeout_ms = (int)MICROPY_FLOAT_C_FUN(ceil)(timeout * 1000);
+}
+
+float common_hal_canio_listener_get_timeout(canio_listener_obj_t *self) {
+    return self->timeout_ms / 1000.0f;
+}
+
+void common_hal_canio_listener_check_for_deinit(canio_listener_obj_t *self) {
+    if (!self->can) {
+        raise_deinited_error();
+    }
+    common_hal_canio_can_check_for_deinit(self->can);
+}
+
+// The API has no peek method so we must receive a packet into a holding area
+// and then we can say that we have 1 message pending
+int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self) {
+    while (!self->pending && twai_receive(&self->message_in, 0) == ESP_OK) {
+        if (self->message_in.extd && self->extended) {
+            self->pending = true;
+        }
+        if (!self->message_in.extd && self->standard) {
+            self->pending = true;
+        }
+    }
+    return self->pending;
+}
+
+mp_obj_t common_hal_canio_listener_receive(canio_listener_obj_t *self) {
+    if (!common_hal_canio_listener_in_waiting(self)) {
+        uint64_t deadline = supervisor_ticks_ms64() + self->timeout_ms;
+        do {
+            if (supervisor_ticks_ms64() > deadline) {
+                return NULL;
+            }
+        } while (!common_hal_canio_listener_in_waiting(self));
+    }
+
+    bool rtr = self->message_in.rtr;
+
+    int dlc = self->message_in.data_length_code;
+    canio_message_obj_t *message = m_new_obj(canio_message_obj_t);
+    message->base.type = rtr ? &canio_remote_transmission_request_type : &canio_message_type;
+    message->extended = self->message_in.extd;
+    message->id = self->message_in.identifier;
+    message->size = dlc;
+
+    if (!rtr) {
+        MP_STATIC_ASSERT(sizeof(self->message_in.data) == sizeof(message->data));
+        memcpy(message->data, self->message_in.data, sizeof(message->data));
+    }
+
+    self->pending = false;
+
+    return message;
+}
+
+void common_hal_canio_listener_deinit(canio_listener_obj_t *self) {
+    if (self->can) {
+        self->can->fifo_in_use = false;
+    }
+    self->can = NULL;
+}
diff --git a/ports/esp32s2/common-hal/canio/Listener.h b/ports/esp32s2/common-hal/canio/Listener.h
new file mode 100644
index 000000000..d24900e43
--- /dev/null
+++ b/ports/esp32s2/common-hal/canio/Listener.h
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jeff Epler for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#pragma once
+
+#include "common-hal/canio/CAN.h"
+#include "shared-module/canio/Match.h"
+
+typedef struct canio_listener_obj {
+    mp_obj_base_t base;
+    canio_can_obj_t *can;
+    bool extended:1;
+    bool standard:1;
+    bool pending:1;
+    twai_message_t message_in;
+    uint32_t timeout_ms;
+} canio_listener_obj_t;
diff --git a/ports/esp32s2/common-hal/canio/__init__.c b/ports/esp32s2/common-hal/canio/__init__.c
new file mode 100644
index 000000000..7932bfc2d
--- /dev/null
+++ b/ports/esp32s2/common-hal/canio/__init__.c
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jeff Epler for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
diff --git a/ports/esp32s2/common-hal/canio/__init__.h b/ports/esp32s2/common-hal/canio/__init__.h
new file mode 100644
index 000000000..20b6638cd
--- /dev/null
+++ b/ports/esp32s2/common-hal/canio/__init__.h
@@ -0,0 +1,27 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jeff Epler for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#pragma once
diff --git a/ports/esp32s2/common-hal/countio/Counter.c b/ports/esp32s2/common-hal/countio/Counter.c
new file mode 100644
index 000000000..fe52d93ad
--- /dev/null
+++ b/ports/esp32s2/common-hal/countio/Counter.c
@@ -0,0 +1,84 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "common-hal/countio/Counter.h"
+#include "common-hal/microcontroller/Pin.h"
+
+#include "py/runtime.h"
+#include "supervisor/shared/translate.h"
+
+void common_hal_countio_counter_construct(countio_counter_obj_t* self,
+    const mcu_pin_obj_t* pin) {
+    claim_pin(pin);
+
+    // Prepare configuration for the PCNT unit
+    const pcnt_config_t pcnt_config = {
+        // Set PCNT input signal and control GPIOs
+        .pulse_gpio_num = pin->number,
+        .ctrl_gpio_num = PCNT_PIN_NOT_USED,
+        .channel = PCNT_CHANNEL_0,
+        // What to do on the positive / negative edge of pulse input?
+        .pos_mode = PCNT_COUNT_INC,   // Count up on the positive edge
+        .neg_mode = PCNT_COUNT_DIS,   // Keep the counter value on the negative edge
+    };
+
+    // Initialize PCNT unit
+    const int8_t unit = peripherals_pcnt_init(pcnt_config);
+    if (unit == -1) {
+        mp_raise_RuntimeError(translate("All PCNT units in use"));
+    }
+
+    self->pin = pin->number;
+    self->unit = (pcnt_unit_t)unit;
+}
+
+bool common_hal_countio_counter_deinited(countio_counter_obj_t* self) {
+    return self->unit == PCNT_UNIT_MAX;
+}
+
+void common_hal_countio_counter_deinit(countio_counter_obj_t* self) {
+    if (common_hal_countio_counter_deinited(self)) {
+        return;
+    }
+    reset_pin_number(self->pin);
+    peripherals_pcnt_deinit(&self->unit);
+}
+
+mp_int_t common_hal_countio_counter_get_count(countio_counter_obj_t* self) {
+    int16_t count;
+    pcnt_get_counter_value(self->unit, &count);
+    return count+self->count;
+}
+
+void common_hal_countio_counter_set_count(countio_counter_obj_t* self,
+        mp_int_t new_count) {
+    self->count = new_count;
+    pcnt_counter_clear(self->unit);
+}
+
+void common_hal_countio_counter_reset(countio_counter_obj_t* self) {
+   common_hal_countio_counter_set_count(self, 0);
+}
diff --git a/ports/esp32s2/common-hal/countio/Counter.h b/ports/esp32s2/common-hal/countio/Counter.h
new file mode 100644
index 000000000..20fe5b83e
--- /dev/null
+++ b/ports/esp32s2/common-hal/countio/Counter.h
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_COUNTIO_COUNTER_H
+#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_COUNTIO_COUNTER_H
+
+#include "py/obj.h"
+#include "peripherals/pcnt.h"
+
+typedef struct {
+    mp_obj_base_t base;
+    uint8_t pin;
+    mp_int_t count;
+    pcnt_unit_t unit;
+} countio_counter_obj_t;
+
+#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_COUNTIO_COUNT_H
diff --git a/ports/esp32s2/common-hal/countio/__init__.c b/ports/esp32s2/common-hal/countio/__init__.c
new file mode 100644
index 000000000..b95b20d15
--- /dev/null
+++ b/ports/esp32s2/common-hal/countio/__init__.c
@@ -0,0 +1 @@
+//No countio module functions
diff --git a/ports/esp32s2/common-hal/displayio/ParallelBus.c b/ports/esp32s2/common-hal/displayio/ParallelBus.c
index 314b72ff7..d0c98f361 100644
--- a/ports/esp32s2/common-hal/displayio/ParallelBus.c
+++ b/ports/esp32s2/common-hal/displayio/ParallelBus.c
@@ -57,7 +57,8 @@ bool common_hal_displayio_parallelbus_begin_transaction(mp_obj_t obj) {
     return false;
 }
 
-void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byte_type, display_chip_select_behavior_t chip_select, uint8_t *data, uint32_t data_length) {
+void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byte_type,
+        display_chip_select_behavior_t chip_select, const uint8_t *data, uint32_t data_length) {
 
 }
 
diff --git a/ports/esp32s2/common-hal/microcontroller/__init__.c b/ports/esp32s2/common-hal/microcontroller/__init__.c
index 6b2e18673..e5cfc7eef 100644
--- a/ports/esp32s2/common-hal/microcontroller/__init__.c
+++ b/ports/esp32s2/common-hal/microcontroller/__init__.c
@@ -85,6 +85,17 @@ const mcu_processor_obj_t common_hal_mcu_processor_obj = {
     },
 };
 
+#if CIRCUITPY_WATCHDOG
+// The singleton watchdog.WatchDogTimer object.
+watchdog_watchdogtimer_obj_t common_hal_mcu_watchdogtimer_obj = {
+    .base = {
+        .type = &watchdog_watchdogtimer_type,
+    },
+    .timeout = 0.0f,
+    .mode = WATCHDOGMODE_NONE,
+};
+#endif
+
 // This maps MCU pin names to pin objects.
 STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_GPIO0), MP_ROM_PTR(&pin_GPIO0) },
diff --git a/ports/esp32s2/common-hal/neopixel_write/__init__.c b/ports/esp32s2/common-hal/neopixel_write/__init__.c
index 553cb79f8..63d50bf14 100644
--- a/ports/esp32s2/common-hal/neopixel_write/__init__.c
+++ b/ports/esp32s2/common-hal/neopixel_write/__init__.c
@@ -125,4 +125,6 @@ void common_hal_neopixel_write (const digitalio_digitalinout_obj_t* digitalinout
 
     // Free channel again
     esp32s2_peripherals_free_rmt(config.channel);
+    // Swap pin back to GPIO mode
+    gpio_set_direction(digitalinout->pin->number, GPIO_MODE_OUTPUT);
 }
diff --git a/ports/esp32s2/common-hal/pulseio/PulseIn.c b/ports/esp32s2/common-hal/pulseio/PulseIn.c
index f7429ec12..9feeea147 100644
--- a/ports/esp32s2/common-hal/pulseio/PulseIn.c
+++ b/ports/esp32s2/common-hal/pulseio/PulseIn.c
@@ -77,7 +77,9 @@ void pulsein_reset(void) {
     for (size_t i = 0; i < RMT_CHANNEL_MAX; i++) {
         handles[i] = NULL;
     }
-    supervisor_disable_tick();
+    if (refcount != 0) {
+        supervisor_disable_tick();
+    }
     refcount = 0;
 }
 
@@ -122,8 +124,10 @@ void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, const mcu
 
     // start RMT RX, and enable ticks so the core doesn't turn off.
     rmt_rx_start(channel, true);
-    supervisor_enable_tick();
     refcount++;
+    if (refcount == 1) {
+        supervisor_enable_tick();
+    }
 }
 
 bool common_hal_pulseio_pulsein_deinited(pulseio_pulsein_obj_t* self) {
diff --git a/ports/esp32s2/common-hal/rotaryio/IncrementalEncoder.c b/ports/esp32s2/common-hal/rotaryio/IncrementalEncoder.c
new file mode 100644
index 000000000..25529ac72
--- /dev/null
+++ b/ports/esp32s2/common-hal/rotaryio/IncrementalEncoder.c
@@ -0,0 +1,86 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "common-hal/rotaryio/IncrementalEncoder.h"
+#include "common-hal/microcontroller/Pin.h"
+
+#include "py/runtime.h"
+#include "supervisor/shared/translate.h"
+
+void common_hal_rotaryio_incrementalencoder_construct(rotaryio_incrementalencoder_obj_t* self,
+    const mcu_pin_obj_t* pin_a, const mcu_pin_obj_t* pin_b) {
+    claim_pin(pin_a);
+    claim_pin(pin_b);
+
+    // Prepare configuration for the PCNT unit
+    const pcnt_config_t pcnt_config = {
+        // Set PCNT input signal and control GPIOs
+        .pulse_gpio_num = pin_a->number,
+        .ctrl_gpio_num = pin_b->number,
+        .channel = PCNT_CHANNEL_0,
+        // What to do on the positive / negative edge of pulse input?
+        .pos_mode = PCNT_COUNT_DEC,   // Count up on the positive edge
+        .neg_mode = PCNT_COUNT_INC,   // Keep the counter value on the negative edge
+        // What to do when control input is low or high?
+        .lctrl_mode = PCNT_MODE_REVERSE, // Reverse counting direction if low
+        .hctrl_mode = PCNT_MODE_KEEP,    // Keep the primary counter mode if high
+    };
+
+     // Initialize PCNT unit
+    const int8_t unit = peripherals_pcnt_init(pcnt_config);
+    if (unit == -1) {
+        mp_raise_RuntimeError(translate("All PCNT units in use"));
+    }
+
+    self->pin_a = pin_a->number;
+    self->pin_b = pin_b->number;
+    self->unit = (pcnt_unit_t)unit;
+}
+
+bool common_hal_rotaryio_incrementalencoder_deinited(rotaryio_incrementalencoder_obj_t* self) {
+    return self->unit == PCNT_UNIT_MAX;
+}
+
+void common_hal_rotaryio_incrementalencoder_deinit(rotaryio_incrementalencoder_obj_t* self) {
+    if (common_hal_rotaryio_incrementalencoder_deinited(self)) {
+        return;
+    }
+    reset_pin_number(self->pin_a);
+    reset_pin_number(self->pin_b);
+    peripherals_pcnt_deinit(&self->unit);
+}
+
+mp_int_t common_hal_rotaryio_incrementalencoder_get_position(rotaryio_incrementalencoder_obj_t* self) {
+    int16_t count;
+    pcnt_get_counter_value(self->unit, &count);
+    return (count/2)+self->position;
+}
+
+void common_hal_rotaryio_incrementalencoder_set_position(rotaryio_incrementalencoder_obj_t* self,
+        mp_int_t new_position) {
+    self->position = new_position;
+    pcnt_counter_clear(self->unit);
+}
diff --git a/ports/esp32s2/common-hal/rotaryio/IncrementalEncoder.h b/ports/esp32s2/common-hal/rotaryio/IncrementalEncoder.h
new file mode 100644
index 000000000..8a717b7b5
--- /dev/null
+++ b/ports/esp32s2/common-hal/rotaryio/IncrementalEncoder.h
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_ROTARYIO_INCREMENTALENCODER_H
+#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_ROTARYIO_INCREMENTALENCODER_H
+
+#include "py/obj.h"
+#include "peripherals/pcnt.h"
+
+typedef struct {
+    mp_obj_base_t base;
+    uint8_t pin_a, pin_b;
+    mp_int_t position;
+    pcnt_unit_t unit;
+} rotaryio_incrementalencoder_obj_t;
+
+#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_ROTARYIO_INCREMENTALENCODER_H
diff --git a/ports/esp32s2/common-hal/rotaryio/__init__.c b/ports/esp32s2/common-hal/rotaryio/__init__.c
new file mode 100644
index 000000000..0aae79c26
--- /dev/null
+++ b/ports/esp32s2/common-hal/rotaryio/__init__.c
@@ -0,0 +1 @@
+// No rotaryio module functions.
diff --git a/ports/esp32s2/common-hal/socketpool/Socket.c b/ports/esp32s2/common-hal/socketpool/Socket.c
index 0a994c604..750415dc7 100644
--- a/ports/esp32s2/common-hal/socketpool/Socket.c
+++ b/ports/esp32s2/common-hal/socketpool/Socket.c
@@ -79,15 +79,15 @@ mp_uint_t common_hal_socketpool_socket_send(socketpool_socket_obj_t* self, const
 
 mp_uint_t common_hal_socketpool_socket_recv_into(socketpool_socket_obj_t* self, const uint8_t* buf, mp_uint_t len) {
     size_t received = 0;
-    ssize_t last_read = 1;
+    int status = 0;
     uint64_t start_ticks = supervisor_ticks_ms64();
     int sockfd;
     esp_err_t err = esp_tls_get_conn_sockfd(self->tcp, &sockfd);
     if (err != ESP_OK) {
         mp_raise_OSError(MP_EBADF);
     }
-    while (received < len &&
-           last_read > 0 &&
+    while (received == 0 &&
+           status >= 0 &&
            (self->timeout_ms == 0 || supervisor_ticks_ms64() - start_ticks <= self->timeout_ms) &&
            !mp_hal_is_interrupted()) {
         RUN_BACKGROUND_TASKS;
@@ -95,27 +95,25 @@ mp_uint_t common_hal_socketpool_socket_recv_into(socketpool_socket_obj_t* self,
         if (available == 0) {
             // This reads the raw socket buffer and is used for non-TLS connections
             // and between encrypted TLS blocks.
-            int status = lwip_ioctl(sockfd, FIONREAD, &available);
-            if (status < 0) {
-                last_read = status;
-                break;
-            }
+            status = lwip_ioctl(sockfd, FIONREAD, &available);
         }
         size_t remaining = len - received;
         if (available > remaining) {
             available = remaining;
         }
         if (available > 0) {
-            last_read = esp_tls_conn_read(self->tcp, (void*) buf + received, available);
-            received += last_read;
+            status = esp_tls_conn_read(self->tcp, (void*) buf + received, available);
+            if (status > 0) {
+                received += status;
+            }
         }
     }
 
-    if (last_read == 0) {
+    if (received == 0) {
         // socket closed
         common_hal_socketpool_socket_close(self);
     }
-    if (last_read < 0) {
+    if (status < 0) {
         mp_raise_BrokenPipeError();
     }
     return received;
diff --git a/ports/esp32s2/common-hal/touchio/TouchIn.c b/ports/esp32s2/common-hal/touchio/TouchIn.c
new file mode 100644
index 000000000..b44234775
--- /dev/null
+++ b/ports/esp32s2/common-hal/touchio/TouchIn.c
@@ -0,0 +1,96 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "shared-bindings/touchio/TouchIn.h"
+#include "py/runtime.h"
+
+#include "driver/touch_pad.h"
+
+static uint16_t get_raw_reading(touchio_touchin_obj_t *self) {
+    uint32_t touch_value;
+    touch_pad_read_raw_data((touch_pad_t)self->pin->touch_channel, &touch_value);
+    if (touch_value > UINT16_MAX) {
+        return UINT16_MAX;
+    }
+    return touch_value;
+}
+
+void common_hal_touchio_touchin_construct(touchio_touchin_obj_t* self,
+        const mcu_pin_obj_t *pin) {
+    if (pin->touch_channel == TOUCH_PAD_MAX) {
+        mp_raise_ValueError(translate("Invalid pin"));
+    }
+    claim_pin(pin);
+
+    touch_pad_init();
+    touch_pad_config((touch_pad_t)pin->touch_channel);
+
+    touch_pad_set_fsm_mode(TOUCH_FSM_MODE_TIMER);
+    touch_pad_fsm_start();
+
+    // wait for "raw data" to reset
+    mp_hal_delay_ms(10);
+
+    // Initial values for pins will vary, depending on what peripherals the pins
+    // share on-chip.
+
+    // Set a "touched" threshold not too far above the initial value.
+    // For simple finger touch, the values may vary as much as a factor of two,
+    // but for touches using fruit or other objects, the difference is much less.
+
+    self->pin = pin;
+    self->threshold = get_raw_reading(self) + 100;
+}
+
+bool common_hal_touchio_touchin_deinited(touchio_touchin_obj_t* self) {
+    return self->pin == NULL;
+}
+
+void common_hal_touchio_touchin_deinit(touchio_touchin_obj_t* self) {
+    if (common_hal_touchio_touchin_deinited(self)) {
+        return;
+    }
+    touch_pad_deinit();
+    reset_pin_number(self->pin->touch_channel);
+    self->pin = NULL;
+}
+
+bool common_hal_touchio_touchin_get_value(touchio_touchin_obj_t *self) {
+    uint16_t reading = get_raw_reading(self);
+    return reading > self->threshold;
+}
+
+uint16_t common_hal_touchio_touchin_get_raw_value(touchio_touchin_obj_t *self) {
+    return get_raw_reading(self);
+}
+
+uint16_t common_hal_touchio_touchin_get_threshold(touchio_touchin_obj_t *self) {
+    return self->threshold;
+}
+
+void common_hal_touchio_touchin_set_threshold(touchio_touchin_obj_t *self, uint16_t new_threshold) {
+    self->threshold = new_threshold;
+}
diff --git a/ports/esp32s2/common-hal/touchio/TouchIn.h b/ports/esp32s2/common-hal/touchio/TouchIn.h
new file mode 100644
index 000000000..91de20931
--- /dev/null
+++ b/ports/esp32s2/common-hal/touchio/TouchIn.h
@@ -0,0 +1,42 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_TOUCHIO_TOUCHIN_H
+#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_TOUCHIO_TOUCHIN_H
+
+#include "common-hal/microcontroller/Pin.h"
+
+#include "py/obj.h"
+
+typedef struct {
+    mp_obj_base_t base;
+    const mcu_pin_obj_t * pin;
+    uint16_t threshold;
+} touchio_touchin_obj_t;
+
+void touchin_reset(void);
+
+#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_TOUCHIO_TOUCHIN_H
diff --git a/ports/esp32s2/common-hal/touchio/__init__.c b/ports/esp32s2/common-hal/touchio/__init__.c
new file mode 100644
index 000000000..d2290447c
--- /dev/null
+++ b/ports/esp32s2/common-hal/touchio/__init__.c
@@ -0,0 +1 @@
+// No touchio module functions.
diff --git a/ports/esp32s2/common-hal/watchdog/WatchDogMode.c b/ports/esp32s2/common-hal/watchdog/WatchDogMode.c
new file mode 100644
index 000000000..fc4e0e008
--- /dev/null
+++ b/ports/esp32s2/common-hal/watchdog/WatchDogMode.c
@@ -0,0 +1 @@
+// No watchdog module functions.
diff --git a/ports/esp32s2/common-hal/watchdog/WatchDogTimer.c b/ports/esp32s2/common-hal/watchdog/WatchDogTimer.c
new file mode 100644
index 000000000..b51a391b7
--- /dev/null
+++ b/ports/esp32s2/common-hal/watchdog/WatchDogTimer.c
@@ -0,0 +1,93 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/runtime.h"
+#include "common-hal/watchdog/WatchDogTimer.h"
+
+#include "shared-bindings/watchdog/__init__.h"
+#include "shared-bindings/microcontroller/__init__.h"
+
+#include "esp_task_wdt.h"
+
+void esp_task_wdt_isr_user_handler(void) {
+    mp_obj_exception_clear_traceback(MP_OBJ_FROM_PTR(&mp_watchdog_timeout_exception));
+    MP_STATE_VM(mp_pending_exception) = &mp_watchdog_timeout_exception;
+#if MICROPY_ENABLE_SCHEDULER
+    if (MP_STATE_VM(sched_state) == MP_SCHED_IDLE) {
+        MP_STATE_VM(sched_state) = MP_SCHED_PENDING;
+    }
+#endif
+}
+
+void common_hal_watchdog_feed(watchdog_watchdogtimer_obj_t *self) {
+    if (esp_task_wdt_reset() != ESP_OK) {
+        mp_raise_RuntimeError(translate("watchdog not initialized"));
+    }
+}
+
+void common_hal_watchdog_deinit(watchdog_watchdogtimer_obj_t *self) {
+    if (esp_task_wdt_deinit() == ESP_OK) {
+        self->mode = WATCHDOGMODE_NONE;
+    }
+}
+
+void watchdog_reset(void) {
+   common_hal_watchdog_deinit(&common_hal_mcu_watchdogtimer_obj);
+}
+
+static void wdt_config(watchdog_watchdogtimer_obj_t *self) {
+    // enable panic hanler in WATCHDOGMODE_RESET mode
+    // initialize Task Watchdog Timer (TWDT)
+    if (esp_task_wdt_init((uint32_t)self->timeout, (self->mode == WATCHDOGMODE_RESET)) != ESP_OK) {
+        mp_raise_RuntimeError(translate("Initialization failed due to lack of memory"));
+    }
+    esp_task_wdt_add(NULL);
+}
+
+mp_float_t common_hal_watchdog_get_timeout(watchdog_watchdogtimer_obj_t *self) {
+    return self->timeout;
+}
+
+void common_hal_watchdog_set_timeout(watchdog_watchdogtimer_obj_t *self, mp_float_t new_timeout) {
+    if ((uint64_t)new_timeout > UINT32_MAX) {
+        mp_raise_ValueError(translate("timeout duration exceeded the maximum supported value"));
+    }
+    if ((uint32_t)self->timeout != (uint32_t)new_timeout) {
+        self->timeout = new_timeout;
+        wdt_config(self);
+    }
+}
+
+watchdog_watchdogmode_t common_hal_watchdog_get_mode(watchdog_watchdogtimer_obj_t *self) {
+    return self->mode;
+}
+
+void common_hal_watchdog_set_mode(watchdog_watchdogtimer_obj_t *self, watchdog_watchdogmode_t new_mode) {
+    if (self->mode != new_mode) {
+        self->mode = new_mode;
+        wdt_config(self);
+    }
+}
diff --git a/ports/esp32s2/common-hal/watchdog/WatchDogTimer.h b/ports/esp32s2/common-hal/watchdog/WatchDogTimer.h
new file mode 100644
index 000000000..04d9aeee6
--- /dev/null
+++ b/ports/esp32s2/common-hal/watchdog/WatchDogTimer.h
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_WATCHDOG_WATCHDOGTIMER_H
+#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_WATCHDOG_WATCHDOGTIMER_H
+
+#include "py/obj.h"
+#include "shared-bindings/watchdog/WatchDogMode.h"
+#include "shared-bindings/watchdog/WatchDogTimer.h"
+
+struct _watchdog_watchdogtimer_obj_t {
+  mp_obj_base_t base;
+  mp_float_t timeout;
+  watchdog_watchdogmode_t mode;
+};
+
+// This needs to be called in order to disable the watchdog
+void watchdog_reset(void);
+
+#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_WATCHDOG_WATCHDOGTIMER_H
diff --git a/ports/esp32s2/common-hal/watchdog/__init__.c b/ports/esp32s2/common-hal/watchdog/__init__.c
new file mode 100644
index 000000000..fc4e0e008
--- /dev/null
+++ b/ports/esp32s2/common-hal/watchdog/__init__.c
@@ -0,0 +1 @@
+// No watchdog module functions.
diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c
index 5e349c09d..1945da207 100644
--- a/ports/esp32s2/common-hal/wifi/Radio.c
+++ b/ports/esp32s2/common-hal/wifi/Radio.c
@@ -25,6 +25,7 @@
  */
 
 #include "shared-bindings/wifi/Radio.h"
+#include "shared-bindings/wifi/Network.h"
 
 #include <string.h>
 
@@ -38,6 +39,8 @@
 #include "components/esp_wifi/include/esp_wifi.h"
 #include "components/lwip/include/apps/ping/ping_sock.h"
 
+#define MAC_ADDRESS_LENGTH 6
+
 static void start_station(wifi_radio_obj_t *self) {
     if (self->sta_mode) {
         return;
@@ -50,6 +53,8 @@ static void start_station(wifi_radio_obj_t *self) {
     }
     esp_wifi_set_mode(next_mode);
 
+    self->sta_mode = 1;
+
     esp_wifi_set_config(WIFI_MODE_STA, &self->sta_config);
 }
 
@@ -67,14 +72,14 @@ void common_hal_wifi_radio_set_enabled(wifi_radio_obj_t *self, bool enabled) {
         return;
     }
     if (!self->started && enabled) {
+	// esp_wifi_start() would default to soft-AP, thus setting it to station
+        ESP_ERROR_CHECK(esp_wifi_set_mode(WIFI_MODE_STA));
         ESP_ERROR_CHECK(esp_wifi_start());
         self->started = true;
         return;
     }
 }
 
-#define MAC_ADDRESS_LENGTH 6
-
 mp_obj_t common_hal_wifi_radio_get_mac_address(wifi_radio_obj_t *self) {
     uint8_t mac[MAC_ADDRESS_LENGTH];
     esp_wifi_get_mac(ESP_IF_WIFI_STA, mac);
@@ -162,13 +167,66 @@ wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t
     return WIFI_RADIO_ERROR_NONE;
 }
 
+mp_obj_t common_hal_wifi_radio_get_ap_info(wifi_radio_obj_t *self) {
+    if (!esp_netif_is_netif_up(self->netif)) {
+        return mp_const_none;
+    }
+
+    // Make sure the interface is in STA mode
+    if (!self->sta_mode){
+        return mp_const_none;
+    }
+
+    wifi_network_obj_t *ap_info = m_new_obj(wifi_network_obj_t);
+    ap_info->base.type = &wifi_network_type;
+    // From esp_wifi.h, the possible return values (typos theirs):
+    //    ESP_OK: succeed
+    //    ESP_ERR_WIFI_CONN: The station interface don't initialized
+    //    ESP_ERR_WIFI_NOT_CONNECT: The station is in disconnect status
+    if (esp_wifi_sta_get_ap_info(&self->ap_info.record) != ESP_OK){
+        return mp_const_none;
+    } else {
+        memcpy(&ap_info->record, &self->ap_info.record, sizeof(wifi_ap_record_t));
+        return MP_OBJ_FROM_PTR(ap_info);
+    }
+}
+
+mp_obj_t common_hal_wifi_radio_get_ipv4_gateway(wifi_radio_obj_t *self) {
+    if (!esp_netif_is_netif_up(self->netif)) {
+        return mp_const_none;
+    }
+    esp_netif_get_ip_info(self->netif, &self->ip_info);
+    return common_hal_ipaddress_new_ipv4address(self->ip_info.gw.addr);
+}
+
+mp_obj_t common_hal_wifi_radio_get_ipv4_subnet(wifi_radio_obj_t *self) {
+    if (!esp_netif_is_netif_up(self->netif)) {
+        return mp_const_none;
+    }
+    esp_netif_get_ip_info(self->netif, &self->ip_info);
+    return common_hal_ipaddress_new_ipv4address(self->ip_info.netmask.addr);
+}
+
 mp_obj_t common_hal_wifi_radio_get_ipv4_address(wifi_radio_obj_t *self) {
     if (!esp_netif_is_netif_up(self->netif)) {
         return mp_const_none;
     }
-    esp_netif_ip_info_t ip_info;
-    esp_netif_get_ip_info(self->netif, &ip_info);
-    return common_hal_ipaddress_new_ipv4address(ip_info.ip.addr);
+    esp_netif_get_ip_info(self->netif, &self->ip_info);
+    return common_hal_ipaddress_new_ipv4address(self->ip_info.ip.addr);
+}
+
+mp_obj_t common_hal_wifi_radio_get_ipv4_dns(wifi_radio_obj_t *self) {
+    if (!esp_netif_is_netif_up(self->netif)) {
+        return mp_const_none;
+    }
+
+    esp_netif_get_dns_info(self->netif, ESP_NETIF_DNS_MAIN, &self->dns_info);
+
+    // dns_info is of type esp_netif_dns_info_t, which is just ever so slightly
+    // different than esp_netif_ip_info_t used for
+    // common_hal_wifi_radio_get_ipv4_address (includes both ipv4 and 6),
+    // so some extra jumping is required to get to the actual address
+    return common_hal_ipaddress_new_ipv4address(self->dns_info.ip.u_addr.ip4.addr);
 }
 
 mp_int_t common_hal_wifi_radio_ping(wifi_radio_obj_t *self, mp_obj_t ip_address, mp_float_t timeout) {
diff --git a/ports/esp32s2/common-hal/wifi/Radio.h b/ports/esp32s2/common-hal/wifi/Radio.h
index 8679cbef1..c7f484eaf 100644
--- a/ports/esp32s2/common-hal/wifi/Radio.h
+++ b/ports/esp32s2/common-hal/wifi/Radio.h
@@ -32,6 +32,7 @@
 #include "components/esp_event/include/esp_event.h"
 
 #include "shared-bindings/wifi/ScannedNetworks.h"
+#include "shared-bindings/wifi/Network.h"
 
 // Event bits for the Radio event group.
 #define WIFI_SCAN_DONE_BIT BIT0
@@ -46,6 +47,9 @@ typedef struct {
     StaticEventGroup_t event_group;
     EventGroupHandle_t event_group_handle;
     wifi_config_t sta_config;
+    wifi_network_obj_t ap_info;
+    esp_netif_ip_info_t ip_info;
+    esp_netif_dns_info_t dns_info;
     esp_netif_t *netif;
     bool started;
     bool ap_mode;
diff --git a/ports/esp32s2/common-hal/wifi/__init__.c b/ports/esp32s2/common-hal/wifi/__init__.c
index 5c8d2e952..f53e68fc2 100644
--- a/ports/esp32s2/common-hal/wifi/__init__.c
+++ b/ports/esp32s2/common-hal/wifi/__init__.c
@@ -88,18 +88,28 @@ static void event_handler(void* arg, esp_event_base_t event_base,
     }
 }
 
-static bool wifi_inited;
+static bool wifi_inited, wifi_ever_inited;
 
 void common_hal_wifi_init(void) {
     wifi_inited = true;
     common_hal_wifi_radio_obj.base.type = &wifi_radio_type;
 
-    ESP_ERROR_CHECK(esp_netif_init());
-    ESP_ERROR_CHECK(esp_event_loop_create_default());
+    if (!wifi_ever_inited) {
+        ESP_ERROR_CHECK(esp_netif_init());
+        ESP_ERROR_CHECK(esp_event_loop_create_default());
+    }
+    wifi_ever_inited = true;
 
     wifi_radio_obj_t* self = &common_hal_wifi_radio_obj;
     self->netif = esp_netif_create_default_wifi_sta();
 
+    // Even though we just called esp_netif_create_default_wifi_sta,
+    //   station mode isn't actually ready for use until esp_wifi_set_mode()
+    //   is called and the configuration is loaded via esp_wifi_set_config().
+    // Set both convienence flags to false so it's not forgotten.
+    self->sta_mode = 0;
+    self->ap_mode = 0;
+
     self->event_group_handle = xEventGroupCreateStatic(&self->event_group);
     ESP_ERROR_CHECK(esp_event_handler_instance_register(WIFI_EVENT,
                                                         ESP_EVENT_ANY_ID,
@@ -137,7 +147,6 @@ void wifi_reset(void) {
     ESP_ERROR_CHECK(esp_wifi_deinit());
     esp_netif_destroy(radio->netif);
     radio->netif = NULL;
-    ESP_ERROR_CHECK(esp_netif_deinit());
 }
 
 void ipaddress_ipaddress_to_esp_idf(mp_obj_t ip_address, ip_addr_t* esp_ip_address) {
diff --git a/ports/esp32s2/esp-idf b/ports/esp32s2/esp-idf
-Subproject 8bc19ba893e5544d571a753d82b44a84799b94b
+Subproject d06744f5efc382c61cbad8758107cec308feef0
diff --git a/ports/esp32s2/esp-idf-config/sdkconfig.defaults b/ports/esp32s2/esp-idf-config/sdkconfig.defaults
index 4094367e0..025b05caa 100644
--- a/ports/esp32s2/esp-idf-config/sdkconfig.defaults
+++ b/ports/esp32s2/esp-idf-config/sdkconfig.defaults
@@ -135,6 +135,7 @@ CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y
 # CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set
 # CONFIG_COMPILER_WARN_WRITE_STRINGS is not set
 # CONFIG_COMPILER_DISABLE_GCC8_WARNINGS is not set
+# CONFIG_COMPILER_DUMP_RTL_FILES is not set
 # end of Compiler options
 
 #
@@ -264,6 +265,11 @@ CONFIG_ESP32S2_ALLOW_RTC_FAST_MEM_AS_HEAP=y
 # end of Power Management
 
 #
+# ADC-Calibration
+#
+# end of ADC-Calibration
+
+#
 # Common ESP-related
 #
 CONFIG_ESP_ERR_TO_NAME_LOOKUP=y
@@ -332,12 +338,13 @@ CONFIG_ESP_TIMER_IMPL_SYSTIMER=y
 #
 # Wi-Fi
 #
-CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10
-CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32
+CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=4
+CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=8
 # CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set
 CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y
 CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1
-CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=32
+CONFIG_ESP32_WIFI_CACHE_TX_BUFFER_NUM=16
+CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=16
 # CONFIG_ESP32_WIFI_CSI_ENABLED is not set
 CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y
 CONFIG_ESP32_WIFI_TX_BA_WIN=6
@@ -401,6 +408,7 @@ CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0
 # CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set
 CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y
 # CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set
+# CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH is not set
 CONFIG_FREERTOS_DEBUG_OCDAWARE=y
 # end of FreeRTOS
 
@@ -439,7 +447,7 @@ CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y
 # CONFIG_LWIP_L2_TO_L3_COPY is not set
 # CONFIG_LWIP_IRAM_OPTIMIZATION is not set
 CONFIG_LWIP_TIMERS_ONDEMAND=y
-CONFIG_LWIP_MAX_SOCKETS=10
+CONFIG_LWIP_MAX_SOCKETS=4
 # CONFIG_LWIP_USE_ONLY_LWIP_SELECT is not set
 # CONFIG_LWIP_SO_LINGER is not set
 CONFIG_LWIP_SO_REUSE=y
@@ -460,6 +468,9 @@ CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y
 # CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set
 
 #
+# CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH is not set
+
+#
 # DHCP server
 #
 CONFIG_LWIP_DHCPS_LEASE_UNIT=60
@@ -474,15 +485,15 @@ CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8
 #
 # TCP
 #
-CONFIG_LWIP_MAX_ACTIVE_TCP=16
-CONFIG_LWIP_MAX_LISTENING_TCP=16
+CONFIG_LWIP_MAX_ACTIVE_TCP=4
+CONFIG_LWIP_MAX_LISTENING_TCP=4
 CONFIG_LWIP_TCP_MAXRTX=12
 CONFIG_LWIP_TCP_SYNMAXRTX=6
 CONFIG_LWIP_TCP_MSS=1440
 CONFIG_LWIP_TCP_TMR_INTERVAL=250
 CONFIG_LWIP_TCP_MSL=60000
-CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5744
-CONFIG_LWIP_TCP_WND_DEFAULT=5744
+CONFIG_LWIP_TCP_SND_BUF_DEFAULT=2880
+CONFIG_LWIP_TCP_WND_DEFAULT=2880
 CONFIG_LWIP_TCP_RECVMBOX_SIZE=6
 CONFIG_LWIP_TCP_QUEUE_OOSEQ=y
 # CONFIG_LWIP_TCP_SACK_OUT is not set
@@ -505,6 +516,8 @@ CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y
 # CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set
 CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF
 # CONFIG_LWIP_PPP_SUPPORT is not set
+CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE=3
+CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5
 # CONFIG_LWIP_SLIP_SUPPORT is not set
 
 #
@@ -552,8 +565,10 @@ CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y
 # CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set
 CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y
 CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384
-CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096
-# CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set
+CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=2048
+CONFIG_MBEDTLS_DYNAMIC_BUFFER=y
+CONFIG_MBEDTLS_DYNAMIC_FREE_PEER_CERT=y
+CONFIG_MBEDTLS_DYNAMIC_FREE_CONFIG_DATA=y
 # CONFIG_MBEDTLS_DEBUG is not set
 
 #
@@ -706,6 +721,7 @@ CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y
 CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=20
 CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1
 CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=8192
+# CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set
 
 #
 # Auto-detect flash chips
@@ -824,8 +840,8 @@ CONFIG_TCP_MAXRTX=12
 CONFIG_TCP_SYNMAXRTX=6
 CONFIG_TCP_MSS=1440
 CONFIG_TCP_MSL=60000
-CONFIG_TCP_SND_BUF_DEFAULT=5744
-CONFIG_TCP_WND_DEFAULT=5744
+CONFIG_TCP_SND_BUF_DEFAULT=2880
+CONFIG_TCP_WND_DEFAULT=2880
 CONFIG_TCP_RECVMBOX_SIZE=6
 CONFIG_TCP_QUEUE_OOSEQ=y
 # CONFIG_ESP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set
diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk
index 4e8a7bdef..335d2caf7 100644
--- a/ports/esp32s2/mpconfigport.mk
+++ b/ports/esp32s2/mpconfigport.mk
@@ -16,14 +16,20 @@ LONGINT_IMPL = MPZ
 CIRCUITPY_FULL_BUILD = 1
 CIRCUITPY_AUDIOBUSIO = 0
 CIRCUITPY_AUDIOIO = 0
-CIRCUITPY_COUNTIO = 0
+CIRCUITPY_CANIO = 1
+CIRCUITPY_COUNTIO = 1
 CIRCUITPY_FREQUENCYIO = 0
 CIRCUITPY_I2CPERIPHERAL = 0
-CIRCUITPY_ROTARYIO = 0
+CIRCUITPY_ROTARYIO = 1
 CIRCUITPY_NVM = 0
 # We don't have enough endpoints to include MIDI.
 CIRCUITPY_USB_MIDI = 0
 CIRCUITPY_WIFI = 1
+CIRCUITPY_WATCHDOG ?= 1
 CIRCUITPY_ESPIDF = 1
 
+ifndef CIRCUITPY_TOUCHIO_USE_NATIVE
+CIRCUITPY_TOUCHIO_USE_NATIVE = 1
+endif
+
 CIRCUITPY_MODULE ?= none
diff --git a/ports/esp32s2/peripherals/pcnt.c b/ports/esp32s2/peripherals/pcnt.c
new file mode 100644
index 000000000..dd24569be
--- /dev/null
+++ b/ports/esp32s2/peripherals/pcnt.c
@@ -0,0 +1,68 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "peripherals/pcnt.h"
+
+#define PCNT_UNIT_ACTIVE    1
+#define PCNT_UNIT_INACTIVE  0
+
+static uint8_t pcnt_unit_state[4];
+
+void peripherals_pcnt_reset(void) {
+    for (uint8_t i = 0; i<=3; i++) {
+        pcnt_unit_state[i] = PCNT_UNIT_INACTIVE;
+    }
+}
+
+int peripherals_pcnt_init(pcnt_config_t pcnt_config) {
+    // Look for available pcnt unit
+    for (uint8_t i = 0; i<=3; i++) {
+        if (pcnt_unit_state[i] == PCNT_UNIT_INACTIVE) {
+            pcnt_config.unit = (pcnt_unit_t)i;
+            pcnt_unit_state[i] = PCNT_UNIT_ACTIVE;
+            break;
+        } else if (i == 3) {
+            return -1;
+        }
+    }
+
+    // Initialize PCNT unit
+    pcnt_unit_config(&pcnt_config);
+
+    // Initialize PCNT's counter
+    pcnt_counter_pause(pcnt_config.unit);
+    pcnt_counter_clear(pcnt_config.unit);
+
+    // Everything is set up, now go to counting
+    pcnt_counter_resume(pcnt_config.unit);
+
+    return pcnt_config.unit;
+}
+
+void peripherals_pcnt_deinit(pcnt_unit_t* unit) {
+    pcnt_unit_state[*unit] = PCNT_UNIT_INACTIVE;
+    *unit = PCNT_UNIT_MAX;
+}
diff --git a/ports/esp32s2/peripherals/pcnt.h b/ports/esp32s2/peripherals/pcnt.h
new file mode 100644
index 000000000..4fce13f4d
--- /dev/null
+++ b/ports/esp32s2/peripherals/pcnt.h
@@ -0,0 +1,36 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PCNT_HANDLER_H
+#define MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PCNT_HANDLER_H
+
+#include "driver/pcnt.h"
+
+extern int peripherals_pcnt_init(pcnt_config_t pcnt_config);
+extern void peripherals_pcnt_deinit(pcnt_unit_t* unit);
+extern void peripherals_pcnt_reset(void);
+
+#endif  // MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PCNT_HANDLER_H
diff --git a/ports/esp32s2/peripherals/pins.c b/ports/esp32s2/peripherals/pins.c
index 2c8b61c62..0d3d89ad5 100755
--- a/ports/esp32s2/peripherals/pins.c
+++ b/ports/esp32s2/peripherals/pins.c
@@ -29,55 +29,58 @@
 #define NO_ADC 0
 #define NO_ADC_CHANNEL ADC_CHANNEL_MAX
 
+#define NO_TOUCH_CHANNEL TOUCH_PAD_MAX
+
 // This macro is used to simplify pin definition in boards/<board>/pins.c
-#define PIN(p_name, p_number, p_adc_index, p_adc_channel) \
+#define PIN(p_name, p_number, p_adc_index, p_adc_channel, p_touch_channel) \
 const mcu_pin_obj_t pin_## p_name = { \
     PIN_PREFIX_VALUES \
     .number = p_number, \
     .adc_index = p_adc_index, \
     .adc_channel = p_adc_channel, \
+    .touch_channel = p_touch_channel, \
 }
 
-PIN(GPIO0, 0, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO1, 1, ADC_UNIT_1, ADC_CHANNEL_0);
-PIN(GPIO2, 2, ADC_UNIT_1, ADC_CHANNEL_1);
-PIN(GPIO3, 3, ADC_UNIT_1, ADC_CHANNEL_2);
-PIN(GPIO4, 4, ADC_UNIT_1, ADC_CHANNEL_3);
-PIN(GPIO5, 5, ADC_UNIT_1, ADC_CHANNEL_4);
-PIN(GPIO6, 6, ADC_UNIT_1, ADC_CHANNEL_5);
-PIN(GPIO7, 7, ADC_UNIT_1, ADC_CHANNEL_6);
-PIN(GPIO8, 8, ADC_UNIT_1, ADC_CHANNEL_7);
-PIN(GPIO9, 9, ADC_UNIT_1, ADC_CHANNEL_8);
-PIN(GPIO10, 10, ADC_UNIT_1, ADC_CHANNEL_9);
-PIN(GPIO11, 11, ADC_UNIT_2, ADC_CHANNEL_0);
-PIN(GPIO12, 12, ADC_UNIT_2, ADC_CHANNEL_1);
-PIN(GPIO13, 13, ADC_UNIT_2, ADC_CHANNEL_2);
-PIN(GPIO14, 14, ADC_UNIT_2, ADC_CHANNEL_3);
-PIN(GPIO15, 15, ADC_UNIT_2, ADC_CHANNEL_4);
-PIN(GPIO16, 16, ADC_UNIT_2, ADC_CHANNEL_5);
-PIN(GPIO17, 17, ADC_UNIT_2, ADC_CHANNEL_6);
-PIN(GPIO18, 18, ADC_UNIT_2, ADC_CHANNEL_7);
-PIN(GPIO19, 19, ADC_UNIT_2, ADC_CHANNEL_8);
-PIN(GPIO20, 20, ADC_UNIT_2, ADC_CHANNEL_9);
-PIN(GPIO21, 21, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO26, 26, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO27, 27, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO28, 28, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO29, 29, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO30, 30, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO31, 31, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO32, 32, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO33, 33, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO34, 34, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO35, 35, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO36, 36, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO37, 37, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO38, 38, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO39, 39, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO40, 40, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO41, 41, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO42, 42, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO43, 43, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO44, 44, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO45, 45, NO_ADC, NO_ADC_CHANNEL);
-PIN(GPIO46, 46, NO_ADC, NO_ADC_CHANNEL);
+PIN(GPIO0, 0, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO1, 1, ADC_UNIT_1, ADC_CHANNEL_0, TOUCH_PAD_NUM1);
+PIN(GPIO2, 2, ADC_UNIT_1, ADC_CHANNEL_1, TOUCH_PAD_NUM2);
+PIN(GPIO3, 3, ADC_UNIT_1, ADC_CHANNEL_2, TOUCH_PAD_NUM3);
+PIN(GPIO4, 4, ADC_UNIT_1, ADC_CHANNEL_3, TOUCH_PAD_NUM4);
+PIN(GPIO5, 5, ADC_UNIT_1, ADC_CHANNEL_4, TOUCH_PAD_NUM5);
+PIN(GPIO6, 6, ADC_UNIT_1, ADC_CHANNEL_5, TOUCH_PAD_NUM6);
+PIN(GPIO7, 7, ADC_UNIT_1, ADC_CHANNEL_6, TOUCH_PAD_NUM7);
+PIN(GPIO8, 8, ADC_UNIT_1, ADC_CHANNEL_7, TOUCH_PAD_NUM8);
+PIN(GPIO9, 9, ADC_UNIT_1, ADC_CHANNEL_8, TOUCH_PAD_NUM9);
+PIN(GPIO10, 10, ADC_UNIT_1, ADC_CHANNEL_9, TOUCH_PAD_NUM10);
+PIN(GPIO11, 11, ADC_UNIT_2, ADC_CHANNEL_0, TOUCH_PAD_NUM11);
+PIN(GPIO12, 12, ADC_UNIT_2, ADC_CHANNEL_1, TOUCH_PAD_NUM12);
+PIN(GPIO13, 13, ADC_UNIT_2, ADC_CHANNEL_2, TOUCH_PAD_NUM13);
+PIN(GPIO14, 14, ADC_UNIT_2, ADC_CHANNEL_3, TOUCH_PAD_NUM14);
+PIN(GPIO15, 15, ADC_UNIT_2, ADC_CHANNEL_4, NO_TOUCH_CHANNEL);
+PIN(GPIO16, 16, ADC_UNIT_2, ADC_CHANNEL_5, NO_TOUCH_CHANNEL);
+PIN(GPIO17, 17, ADC_UNIT_2, ADC_CHANNEL_6, NO_TOUCH_CHANNEL);
+PIN(GPIO18, 18, ADC_UNIT_2, ADC_CHANNEL_7, NO_TOUCH_CHANNEL);
+PIN(GPIO19, 19, ADC_UNIT_2, ADC_CHANNEL_8, NO_TOUCH_CHANNEL);
+PIN(GPIO20, 20, ADC_UNIT_2, ADC_CHANNEL_9, NO_TOUCH_CHANNEL);
+PIN(GPIO21, 21, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO26, 26, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO27, 27, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO28, 28, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO29, 29, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO30, 30, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO31, 31, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO32, 32, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO33, 33, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO34, 34, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO35, 35, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO36, 36, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO37, 37, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO38, 38, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO39, 39, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO40, 40, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO41, 41, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO42, 42, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO43, 43, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO44, 44, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO45, 45, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO46, 46, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
diff --git a/ports/esp32s2/peripherals/pins.h b/ports/esp32s2/peripherals/pins.h
index 84123a80e..c78eb8385 100644
--- a/ports/esp32s2/peripherals/pins.h
+++ b/ports/esp32s2/peripherals/pins.h
@@ -37,12 +37,14 @@
 
 #include "components/hal/include/hal/gpio_types.h"
 #include "components/hal/include/hal/adc_types.h"
+#include "components/hal/include/hal/touch_sensor_types.h"
 
 typedef struct {
     PIN_PREFIX_FIELDS
     gpio_num_t number;
     uint8_t adc_index:2;
     uint8_t adc_channel:6;
+    uint8_t touch_channel;
 } mcu_pin_obj_t;
 
 extern const mcu_pin_obj_t pin_GPIO0;
diff --git a/ports/esp32s2/supervisor/esp_port.h b/ports/esp32s2/supervisor/esp_port.h
new file mode 100644
index 000000000..1164666cd
--- /dev/null
+++ b/ports/esp32s2/supervisor/esp_port.h
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Lucian Copeland for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_SUPERVISOR_PORT_H
+#define MICROPY_INCLUDED_ESP32S2_SUPERVISOR_PORT_H
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+
+extern TaskHandle_t sleeping_circuitpython_task;
+
+#endif // MICROPY_INCLUDED_ESP32S2_SUPERVISOR_PORT_H
diff --git a/ports/esp32s2/supervisor/port.c b/ports/esp32s2/supervisor/port.c
index 0b9c03f74..876ad739d 100644
--- a/ports/esp32s2/supervisor/port.c
+++ b/ports/esp32s2/supervisor/port.c
@@ -30,6 +30,8 @@
 #include "supervisor/port.h"
 #include "boards/board.h"
 #include "modules/module.h"
+#include "py/runtime.h"
+#include "supervisor/esp_port.h"
 
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
@@ -41,12 +43,14 @@
 #include "common-hal/busio/UART.h"
 #include "common-hal/pulseio/PulseIn.h"
 #include "common-hal/pwmio/PWMOut.h"
+#include "common-hal/watchdog/WatchDogTimer.h"
 #include "common-hal/wifi/__init__.h"
 #include "supervisor/memory.h"
 #include "supervisor/shared/tick.h"
 #include "shared-bindings/rtc/__init__.h"
 
 #include "peripherals/rmt.h"
+#include "peripherals/pcnt.h"
 #include "components/heap/include/esp_heap_caps.h"
 #include "components/soc/soc/esp32s2/include/soc/cache_memory.h"
 
@@ -115,10 +119,18 @@ void reset_port(void) {
     uart_reset();
 #endif
 
+#if defined(CIRCUITPY_COUNTIO) || defined(CIRCUITPY_ROTARYIO)
+    peripherals_pcnt_reset();
+#endif
+
 #if CIRCUITPY_RTC
     rtc_reset();
 #endif
 
+#if CIRCUITPY_WATCHDOG
+    watchdog_reset();
+#endif
+
 #if CIRCUITPY_WIFI
     wifi_reset();
 #endif
@@ -148,7 +160,18 @@ uint32_t *port_stack_get_limit(void) {
 }
 
 uint32_t *port_stack_get_top(void) {
-    return port_stack_get_limit() + CONFIG_ESP_MAIN_TASK_STACK_SIZE / (sizeof(uint32_t) / sizeof(StackType_t));
+    // The sizeof-arithmetic is so that the pointer arithmetic is done on units
+    // of uint32_t instead of units of StackType_t.  StackType_t is an alias
+    // for a byte sized type.
+    //
+    // The main stack is bigger than CONFIG_ESP_MAIN_TASK_STACK_SIZE -- an
+    // "extra" size is added to it (TASK_EXTRA_STACK_SIZE).  This total size is
+    // available as ESP_TASK_MAIN_STACK.  Presumably TASK_EXTRA_STACK_SIZE is
+    // additional stack that can be used by the esp-idf runtime.  But what's
+    // important for us is that some very outermost stack frames, such as
+    // pyexec_friendly_repl, could lie inside the "extra" area and be invisible
+    // to the garbage collector.
+    return port_stack_get_limit() + ESP_TASK_MAIN_STACK / (sizeof(uint32_t) / sizeof(StackType_t));
 }
 
 supervisor_allocation _fixed_stack;
@@ -168,14 +191,14 @@ uint32_t port_get_saved_word(void) {
 }
 
 uint64_t port_get_raw_ticks(uint8_t* subticks) {
-    struct timeval tv_now;
-    gettimeofday(&tv_now, NULL);
-    // convert usec back to ticks
-    uint64_t all_subticks = (uint64_t)(tv_now.tv_usec * 2) / 71;
+    // Convert microseconds to subticks of 1/32768 seconds
+    // 32768/1000000 = 64/15625 in lowest terms
+    // this arithmetic overflows after 570 years
+    int64_t all_subticks = esp_timer_get_time() * 512 / 15625;
     if (subticks != NULL) {
         *subticks = all_subticks % 32;
     }
-    return (uint64_t)tv_now.tv_sec * 1024L + all_subticks / 32;
+    return all_subticks / 32;
 }
 
 // Enable 1/1024 second tick.
@@ -188,25 +211,28 @@ void port_disable_tick(void) {
     esp_timer_stop(_tick_timer);
 }
 
-TickType_t sleep_time_set;
 TickType_t sleep_time_duration;
+
 void port_interrupt_after_ticks(uint32_t ticks) {
-    sleep_time_set = xTaskGetTickCount();
-    sleep_time_duration = ticks / portTICK_PERIOD_MS;
-    // esp_sleep_enable_timer_wakeup(uint64_t time_in_us)
+    sleep_time_duration = (ticks * 100)/1024;
+    sleeping_circuitpython_task = xTaskGetCurrentTaskHandle();
 }
 
 void port_sleep_until_interrupt(void) {
-    // FreeRTOS delay here maybe.
-    // Light sleep shuts down BLE and wifi.
-    // esp_light_sleep_start()
+
+    uint32_t NotifyValue = 0;
+
     if (sleep_time_duration == 0) {
         return;
     }
-    vTaskDelayUntil(&sleep_time_set, sleep_time_duration);
+    xTaskNotifyWait(0x01,0x01,&NotifyValue,
+                             sleep_time_duration );
+    if (NotifyValue == 1) {
+      sleeping_circuitpython_task = NULL;
+      mp_handle_pending();
+    }
 }
 
-
 // Wrap main in app_main that the IDF expects.
 extern void main(void);
 void app_main(void) {
diff --git a/ports/esp32s2/supervisor/usb.c b/ports/esp32s2/supervisor/usb.c
index 1ad6af047..2bfcdfb12 100644
--- a/ports/esp32s2/supervisor/usb.c
+++ b/ports/esp32s2/supervisor/usb.c
@@ -52,6 +52,8 @@
 StackType_t  usb_device_stack[USBD_STACK_SIZE];
 StaticTask_t usb_device_taskdef;
 
+TaskHandle_t sleeping_circuitpython_task = NULL;
+
 // USB Device Driver task
 // This top level thread process all usb events and invoke callbacks
 void usb_device_task(void* param)
@@ -114,3 +116,23 @@ void init_usb_hardware(void) {
                              usb_device_stack,
                              &usb_device_taskdef);
 }
+/**
+ * Callback invoked when received an "wanted" char.
+ * @param itf           Interface index (for multiple cdc interfaces)
+ * @param wanted_char   The wanted char (set previously)
+ */
+void tud_cdc_rx_wanted_cb(uint8_t itf, char wanted_char)
+{
+    (void) itf; // not used
+    // Workaround for using lib/utils/interrupt_char.c
+    // Compare mp_interrupt_char with wanted_char and ignore if not matched
+    if (mp_interrupt_char == wanted_char) {
+        tud_cdc_read_flush();    // flush read fifo
+        mp_keyboard_interrupt();
+        // CircuitPython's VM is run in a separate FreeRTOS task from TinyUSB.
+        // So, we must notify the other task when a CTRL-C is received.
+        if (sleeping_circuitpython_task != NULL) {
+          xTaskNotifyGive(sleeping_circuitpython_task);
+        }
+    }
+}
diff --git a/ports/mimxrt10xx/common-hal/displayio/ParallelBus.c b/ports/mimxrt10xx/common-hal/displayio/ParallelBus.c
index 87a72d0f3..0fdf4413b 100644
--- a/ports/mimxrt10xx/common-hal/displayio/ParallelBus.c
+++ b/ports/mimxrt10xx/common-hal/displayio/ParallelBus.c
@@ -57,7 +57,8 @@ bool common_hal_displayio_parallelbus_begin_transaction(mp_obj_t obj) {
     return false;
 }
 
-void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byte_type, display_chip_select_behavior_t chip_select, uint8_t *data, uint32_t data_length) {
+void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byte_type,
+    display_chip_select_behavior_t chip_select, const uint8_t *data, uint32_t data_length) {
 
 }
 
diff --git a/ports/nrf/boards/ADM_B_NRF52840_1/board.c b/ports/nrf/boards/ADM_B_NRF52840_1/board.c
new file mode 100644
index 000000000..4421970ee
--- /dev/null
+++ b/ports/nrf/boards/ADM_B_NRF52840_1/board.c
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+
+void board_init(void) {
+}
+
+bool board_requests_safe_mode(void) {
+  return false;
+}
+
+void reset_board(void) {
+
+}
diff --git a/ports/nrf/boards/ADM_B_NRF52840_1/mpconfigboard.h b/ports/nrf/boards/ADM_B_NRF52840_1/mpconfigboard.h
new file mode 100644
index 000000000..575d09feb
--- /dev/null
+++ b/ports/nrf/boards/ADM_B_NRF52840_1/mpconfigboard.h
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Glenn Ruben Bakke
+ *
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "nrfx/hal/nrf_gpio.h"
+
+#define MICROPY_HW_BOARD_NAME       "AtelierDuMaker nRF52840 Breakout"
+#define MICROPY_HW_MCU_NAME         "nRF52840"
+
+#define MICROPY_HW_LED_STATUS       (&pin_P0_19)
diff --git a/ports/nrf/boards/ADM_B_NRF52840_1/mpconfigboard.mk b/ports/nrf/boards/ADM_B_NRF52840_1/mpconfigboard.mk
new file mode 100644
index 000000000..f3a2e830d
--- /dev/null
+++ b/ports/nrf/boards/ADM_B_NRF52840_1/mpconfigboard.mk
@@ -0,0 +1,8 @@
+USB_VID = 0x239A
+USB_PID = 0x80A0
+USB_PRODUCT = "ADM_B_NRF52840_1"
+USB_MANUFACTURER = "AtelierDuMaker"
+
+MCU_CHIP = nrf52840
+
+INTERNAL_FLASH_FILESYSTEM = 1
diff --git a/ports/nrf/boards/ADM_B_NRF52840_1/pins.c b/ports/nrf/boards/ADM_B_NRF52840_1/pins.c
new file mode 100644
index 000000000..83be4f0ac
--- /dev/null
+++ b/ports/nrf/boards/ADM_B_NRF52840_1/pins.c
@@ -0,0 +1,57 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
+
+    { MP_ROM_QSTR(MP_QSTR_P1_10), MP_ROM_PTR(&pin_P0_02) },
+    { MP_ROM_QSTR(MP_QSTR_P1_11), MP_ROM_PTR(&pin_P1_11) },
+    { MP_ROM_QSTR(MP_QSTR_P1_13), MP_ROM_PTR(&pin_P1_13) },
+    { MP_ROM_QSTR(MP_QSTR_P1_15), MP_ROM_PTR(&pin_P1_15) },
+    { MP_ROM_QSTR(MP_QSTR_P0_03), MP_ROM_PTR(&pin_P0_03) },
+    { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) },
+    { MP_ROM_QSTR(MP_QSTR_P0_28), MP_ROM_PTR(&pin_P0_28) },
+    { MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) },
+    { MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) },
+    { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) },
+    { MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) },
+    { MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) },
+    { MP_ROM_QSTR(MP_QSTR_P1_14), MP_ROM_PTR(&pin_P1_14) },
+    { MP_ROM_QSTR(MP_QSTR_P1_12), MP_ROM_PTR(&pin_P1_12) },
+    { MP_ROM_QSTR(MP_QSTR_P0_25), MP_ROM_PTR(&pin_P0_25) },
+    { MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) },
+    { MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) },
+    { MP_ROM_QSTR(MP_QSTR_P0_27), MP_ROM_PTR(&pin_P0_28) },
+    { MP_ROM_QSTR(MP_QSTR_P0_08), MP_ROM_PTR(&pin_P0_08) },
+    { MP_ROM_QSTR(MP_QSTR_P0_06), MP_ROM_PTR(&pin_P0_06) },
+    { MP_ROM_QSTR(MP_QSTR_P0_26), MP_ROM_PTR(&pin_P0_26) },
+
+    { MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) },
+    { MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) },
+    { MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) },
+    { MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) },
+    { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) },
+    { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) },
+    { MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) },
+    { MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) },
+    { MP_ROM_QSTR(MP_QSTR_P0_22), MP_ROM_PTR(&pin_P0_22) },
+    { MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) },
+    { MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) },
+    { MP_ROM_QSTR(MP_QSTR_P0_24), MP_ROM_PTR(&pin_P0_24) },
+    { MP_ROM_QSTR(MP_QSTR_P0_20), MP_ROM_PTR(&pin_P0_20) },
+    { MP_ROM_QSTR(MP_QSTR_P0_17), MP_ROM_PTR(&pin_P0_17) },
+    { MP_ROM_QSTR(MP_QSTR_P0_15), MP_ROM_PTR(&pin_P0_15) },
+    { MP_ROM_QSTR(MP_QSTR_P0_14), MP_ROM_PTR(&pin_P0_14) },
+    { MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) },
+    { MP_ROM_QSTR(MP_QSTR_P0_16), MP_ROM_PTR(&pin_P0_16) },
+
+    { MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) },
+    { MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) },
+    { MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) },
+    { MP_ROM_QSTR(MP_QSTR_P0_23), MP_ROM_PTR(&pin_P0_23) },
+    { MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) },
+    { MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) },
+
+    // RESET { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) }
+
+};
+
+MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
diff --git a/ports/nrf/boards/hiibot_bluefi/pins.c b/ports/nrf/boards/hiibot_bluefi/pins.c
index 340ea948c..bce4ee52d 100644
--- a/ports/nrf/boards/hiibot_bluefi/pins.c
+++ b/ports/nrf/boards/hiibot_bluefi/pins.c
@@ -109,10 +109,10 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_D26), MP_ROM_PTR(&pin_P0_27) },
     { MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_P0_27) },
 
-    { MP_ROM_QSTR(MP_QSTR_P27), MP_ROM_PTR(&pin_P1_14) },
-    { MP_ROM_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_P1_14) },
-    { MP_ROM_QSTR(MP_QSTR_TFT_RESET), MP_ROM_PTR(&pin_P1_14) },
-    { MP_ROM_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_P1_14) },
+    { MP_ROM_QSTR(MP_QSTR_P27), MP_ROM_PTR(&pin_P1_13) },
+    { MP_ROM_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_P1_13) },
+    //{ MP_ROM_QSTR(MP_QSTR_TFT_RESET), MP_ROM_PTR(&pin_P1_13) },
+    { MP_ROM_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_P1_13) },
 
     // P28~P33/D28~D33 connecte into QSPI FlashROM (W25Q16JV_IQ)
 
diff --git a/ports/nrf/common-hal/displayio/ParallelBus.c b/ports/nrf/common-hal/displayio/ParallelBus.c
index f13e03163..31ee1f48e 100644
--- a/ports/nrf/common-hal/displayio/ParallelBus.c
+++ b/ports/nrf/common-hal/displayio/ParallelBus.c
@@ -141,7 +141,8 @@ bool common_hal_displayio_parallelbus_begin_transaction(mp_obj_t obj) {
 }
 
 // This ignores chip_select behaviour because data is clocked in by the write line toggling.
-void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byte_type, display_chip_select_behavior_t chip_select, uint8_t *data, uint32_t data_length) {
+void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byte_type,
+    display_chip_select_behavior_t chip_select, const uint8_t *data, uint32_t data_length) {
     displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj);
     common_hal_digitalio_digitalinout_set_value(&self->command, byte_type == DISPLAY_DATA);
     uint32_t* clear_write = (uint32_t*) &self->write_group->OUTCLR;
diff --git a/ports/nrf/common-hal/watchdog/WatchDogTimer.c b/ports/nrf/common-hal/watchdog/WatchDogTimer.c
index bec0ac473..539b43e76 100644
--- a/ports/nrf/common-hal/watchdog/WatchDogTimer.c
+++ b/ports/nrf/common-hal/watchdog/WatchDogTimer.c
@@ -93,6 +93,9 @@ void common_hal_watchdog_feed(watchdog_watchdogtimer_obj_t *self) {
 }
 
 void common_hal_watchdog_deinit(watchdog_watchdogtimer_obj_t *self) {
+    if (self->mode == WATCHDOGMODE_RESET) {
+        mp_raise_NotImplementedError(translate("WatchDogTimer cannot be deinitialized once mode is set to RESET"));
+    }
     if (timer) {
         timer_free();
     }
diff --git a/ports/stm/common-hal/displayio/ParallelBus.c b/ports/stm/common-hal/displayio/ParallelBus.c
index 314b72ff7..fd07d38af 100644
--- a/ports/stm/common-hal/displayio/ParallelBus.c
+++ b/ports/stm/common-hal/displayio/ParallelBus.c
@@ -57,7 +57,8 @@ bool common_hal_displayio_parallelbus_begin_transaction(mp_obj_t obj) {
     return false;
 }
 
-void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byte_type, display_chip_select_behavior_t chip_select, uint8_t *data, uint32_t data_length) {
+void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byte_type,
+    display_chip_select_behavior_t chip_select, const uint8_t *data, uint32_t data_length) {
 
 }