Merge branch 'main' into fix-touch

43 files changed, 1586 insertions, 13 deletions

diff --git a/ports/atmel-samd/boards/cp_sapling_m0/board.c b/ports/atmel-samd/boards/cp_sapling_m0/board.c
new file mode 100644
index 000000000..ce5636676
--- /dev/null
+++ b/ports/atmel-samd/boards/cp_sapling_m0/board.c
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "common-hal/microcontroller/Pin.h"
+#include "supervisor/shared/board.h"
+#include "hal/include/hal_gpio.h"
+
+void board_init(void) {
+}
+
+bool board_requests_safe_mode(void) {
+    return false;
+}
+
+void reset_board(void) {
+}
diff --git a/ports/atmel-samd/boards/cp_sapling_m0/mpconfigboard.h b/ports/atmel-samd/boards/cp_sapling_m0/mpconfigboard.h
new file mode 100644
index 000000000..c67f022eb
--- /dev/null
+++ b/ports/atmel-samd/boards/cp_sapling_m0/mpconfigboard.h
@@ -0,0 +1,57 @@
+#define MICROPY_HW_BOARD_NAME "CP Sapling M0"
+#define MICROPY_HW_MCU_NAME "samd21e18"
+
+#define MICROPY_HW_NEOPIXEL (&pin_PA15)
+
+#define MICROPY_PORT_A        (0)
+#define MICROPY_PORT_B        (0)
+#define MICROPY_PORT_C        (0)
+
+#define IGNORE_PIN_PA02	    1
+#define IGNORE_PIN_PA03	    1
+#define IGNORE_PIN_PA04	    1
+#define IGNORE_PIN_PA05	    1
+#define IGNORE_PIN_PA06	    1
+#define IGNORE_PIN_PA07	    1
+#define IGNORE_PIN_PA12     1
+#define IGNORE_PIN_PA13     1
+#define IGNORE_PIN_PA14	    1
+#define IGNORE_PIN_PA20     1
+#define IGNORE_PIN_PA21     1
+// USB is always used internally so skip the pin objects for it.
+#define IGNORE_PIN_PA24     1
+#define IGNORE_PIN_PA25     1
+#define IGNORE_PIN_PA27     1
+#define IGNORE_PIN_PA28     1
+#define IGNORE_PIN_PA30     1
+#define IGNORE_PIN_PA31     1
+#define IGNORE_PIN_PB01     1
+#define IGNORE_PIN_PB02     1
+#define IGNORE_PIN_PB03     1
+#define IGNORE_PIN_PB04     1
+#define IGNORE_PIN_PB05     1
+#define IGNORE_PIN_PB06     1
+#define IGNORE_PIN_PB07     1
+#define IGNORE_PIN_PB08     1
+#define IGNORE_PIN_PB09     1
+#define IGNORE_PIN_PB10     1
+#define IGNORE_PIN_PB11     1
+#define IGNORE_PIN_PB12     1
+#define IGNORE_PIN_PB13     1
+#define IGNORE_PIN_PB14     1
+#define IGNORE_PIN_PB15     1
+#define IGNORE_PIN_PB16     1
+#define IGNORE_PIN_PB17     1
+#define IGNORE_PIN_PB22     1
+#define IGNORE_PIN_PB23     1
+#define IGNORE_PIN_PB30     1
+#define IGNORE_PIN_PB31     1
+#define IGNORE_PIN_PB00     1
+
+#define DEFAULT_I2C_BUS_SCL (&pin_PA09)
+#define DEFAULT_I2C_BUS_SDA (&pin_PA08)
+
+#define DEFAULT_SPI_BUS_SS (&pin_PA22)
+#define DEFAULT_SPI_BUS_SCK (&pin_PA19)
+#define DEFAULT_SPI_BUS_MOSI (&pin_PA18)
+#define DEFAULT_SPI_BUS_MISO (&pin_PA17)
diff --git a/ports/atmel-samd/boards/cp_sapling_m0/mpconfigboard.mk b/ports/atmel-samd/boards/cp_sapling_m0/mpconfigboard.mk
new file mode 100644
index 000000000..861a0a5f7
--- /dev/null
+++ b/ports/atmel-samd/boards/cp_sapling_m0/mpconfigboard.mk
@@ -0,0 +1,24 @@
+USB_VID = 0x1209
+USB_PID = 0x4DDD
+USB_PRODUCT = "CP Sapling"
+USB_MANUFACTURER = "Oak Development Technologies"
+
+CHIP_VARIANT = SAMD21E18A
+CHIP_FAMILY = samd21
+
+INTERNAL_FLASH_FILESYSTEM = 1
+LONGINT_IMPL = NONE
+CIRCUITPY_FULL_BUILD = 0
+
+SUPEROPT_GC = 0
+
+CFLAGS_BOARD = --param max-inline-insns-auto=15
+ifeq ($(TRANSLATION), zh_Latn_pinyin)
+RELEASE_NEEDS_CLEAN_BUILD = 1
+CFLAGS_INLINE_LIMIT = 35
+endif
+ifeq ($(TRANSLATION), de_DE)
+RELEASE_NEEDS_CLEAN_BUILD = 1
+CFLAGS_INLINE_LIMIT = 35
+SUPEROPT_VM = 0
+endif
diff --git a/ports/atmel-samd/boards/cp_sapling_m0/pins.c b/ports/atmel-samd/boards/cp_sapling_m0/pins.c
new file mode 100644
index 000000000..d527aaddc
--- /dev/null
+++ b/ports/atmel-samd/boards/cp_sapling_m0/pins.c
@@ -0,0 +1,38 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+
+    { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA08) },
+    { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) },
+
+    { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA00) },
+    { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA00) },
+
+    { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA01) },
+    { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA01) },
+
+    { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA09) },
+    { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) },
+
+    { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA22) },
+    { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA22) },
+    { MP_ROM_QSTR(MP_QSTR_SS), MP_ROM_PTR(&pin_PA22) },
+
+    { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA19) },
+    { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA19) },
+    { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA19) },
+
+    { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA17) },
+    { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA17) },
+    { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA17) },
+
+    { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA18) },
+    { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA18) },
+    { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA18) },
+
+    { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) },
+
+    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
+    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/board.c b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/board.c
new file mode 100644
index 000000000..ce5636676
--- /dev/null
+++ b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/board.c
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "common-hal/microcontroller/Pin.h"
+#include "supervisor/shared/board.h"
+#include "hal/include/hal_gpio.h"
+
+void board_init(void) {
+}
+
+bool board_requests_safe_mode(void) {
+    return false;
+}
+
+void reset_board(void) {
+}
diff --git a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h
new file mode 100644
index 000000000..9c69c4802
--- /dev/null
+++ b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h
@@ -0,0 +1,62 @@
+#define MICROPY_HW_BOARD_NAME "CP Sapling M0 w/ SPI Flash"
+#define MICROPY_HW_MCU_NAME "samd21e18"
+
+#define MICROPY_HW_NEOPIXEL (&pin_PA15)
+
+#define MICROPY_PORT_A        (0)
+#define MICROPY_PORT_B        (0)
+#define MICROPY_PORT_C        (0)
+
+#define SPI_FLASH_MOSI_PIN          &pin_PA18
+#define SPI_FLASH_MISO_PIN          &pin_PA17
+#define SPI_FLASH_SCK_PIN           &pin_PA19
+#define SPI_FLASH_CS_PIN            &pin_PA22
+
+#define IGNORE_PIN_PA02	    1
+#define IGNORE_PIN_PA03	    1
+#define IGNORE_PIN_PA04	    1
+#define IGNORE_PIN_PA05	    1
+#define IGNORE_PIN_PA06	    1
+#define IGNORE_PIN_PA07	    1
+#define IGNORE_PIN_PA12     1
+#define IGNORE_PIN_PA13     1
+#define IGNORE_PIN_PA14	    1
+#define IGNORE_PIN_PA20     1
+#define IGNORE_PIN_PA21     1
+// USB is always used internally so skip the pin objects for it.
+#define IGNORE_PIN_PA24     1
+#define IGNORE_PIN_PA25     1
+#define IGNORE_PIN_PA27     1
+#define IGNORE_PIN_PA28     1
+#define IGNORE_PIN_PA30     1
+#define IGNORE_PIN_PA31     1
+#define IGNORE_PIN_PB01     1
+#define IGNORE_PIN_PB02     1
+#define IGNORE_PIN_PB03     1
+#define IGNORE_PIN_PB04     1
+#define IGNORE_PIN_PB05     1
+#define IGNORE_PIN_PB06     1
+#define IGNORE_PIN_PB07     1
+#define IGNORE_PIN_PB08     1
+#define IGNORE_PIN_PB09     1
+#define IGNORE_PIN_PB10     1
+#define IGNORE_PIN_PB11     1
+#define IGNORE_PIN_PB12     1
+#define IGNORE_PIN_PB13     1
+#define IGNORE_PIN_PB14     1
+#define IGNORE_PIN_PB15     1
+#define IGNORE_PIN_PB16     1
+#define IGNORE_PIN_PB17     1
+#define IGNORE_PIN_PB22     1
+#define IGNORE_PIN_PB23     1
+#define IGNORE_PIN_PB30     1
+#define IGNORE_PIN_PB31     1
+#define IGNORE_PIN_PB00     1
+
+#define DEFAULT_I2C_BUS_SCL (&pin_PA09)
+#define DEFAULT_I2C_BUS_SDA (&pin_PA08)
+
+#define DEFAULT_SPI_BUS_SS (&pin_PA22)
+#define DEFAULT_SPI_BUS_SCK (&pin_PA19)
+#define DEFAULT_SPI_BUS_MOSI (&pin_PA18)
+#define DEFAULT_SPI_BUS_MISO (&pin_PA17)
diff --git a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk
new file mode 100644
index 000000000..99e13f791
--- /dev/null
+++ b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk
@@ -0,0 +1,33 @@
+USB_VID = 0x1209
+USB_PID = 0x4DDE
+USB_PRODUCT = "CP Sapling M0 w/ SPI Flash"
+USB_MANUFACTURER = "Oak Development Technologies"
+
+CHIP_VARIANT = SAMD21E18A
+CHIP_FAMILY = samd21
+
+INTERNAL_FLASH_FILESYSTEM = 0
+LONGINT_IMPL = MPZ
+SPI_FLASH_FILESYSTEM = 1
+EXTERNAL_FLASH_DEVICE_COUNT = 1
+EXTERNAL_FLASH_DEVICES = AT25DF081A
+
+CIRCUITPY_AUDIOIO = 0
+CIRCUITPY_AUDIOBUSIO = 0
+CIRCUITPY_BITBANGIO = 0
+CIRCUITPY_COUNTIO = 0
+CIRCUITPY_FREQUENCYIO = 0
+CIRCUITPY_I2CPERIPHERAL = 0
+
+SUPEROPT_GC = 0
+
+CFLAGS_BOARD = --param max-inline-insns-auto=15
+ifeq ($(TRANSLATION), zh_Latn_pinyin)
+RELEASE_NEEDS_CLEAN_BUILD = 1
+CFLAGS_INLINE_LIMIT = 35
+endif
+ifeq ($(TRANSLATION), de_DE)
+RELEASE_NEEDS_CLEAN_BUILD = 1
+CFLAGS_INLINE_LIMIT = 35
+SUPEROPT_VM = 0
+endif
diff --git a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/pins.c b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/pins.c
new file mode 100644
index 000000000..d527aaddc
--- /dev/null
+++ b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/pins.c
@@ -0,0 +1,38 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+
+    { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA08) },
+    { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) },
+
+    { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA00) },
+    { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA00) },
+
+    { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA01) },
+    { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA01) },
+
+    { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA09) },
+    { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) },
+
+    { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA22) },
+    { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA22) },
+    { MP_ROM_QSTR(MP_QSTR_SS), MP_ROM_PTR(&pin_PA22) },
+
+    { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA19) },
+    { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA19) },
+    { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA19) },
+
+    { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA17) },
+    { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA17) },
+    { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA17) },
+
+    { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA18) },
+    { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA18) },
+    { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA18) },
+
+    { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) },
+
+    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
+    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/atmel-samd/common-hal/audiobusio/PDMIn.c b/ports/atmel-samd/common-hal/audiobusio/PDMIn.c
index 3c9ec05c2..8911aef2f 100644
--- a/ports/atmel-samd/common-hal/audiobusio/PDMIn.c
+++ b/ports/atmel-samd/common-hal/audiobusio/PDMIn.c
@@ -337,7 +337,11 @@ const uint16_t sinc_filter [OVERSAMPLING] = {
     94, 63, 39, 21, 9, 2, 0, 0
 };
 
-#define REPEAT_16_TIMES(X) X X X X X X X X X X X X X X X X
+#ifdef SAMD21
+#define REPEAT_16_TIMES(X) do { for(uint8_t j=0; j<4; j++) { X X X X } } while (0)
+#else
+#define REPEAT_16_TIMES(X) do { X X X X X X X X X X X X X X X X } while(0)
+#endif
 
 static uint16_t filter_sample(uint32_t pdm_samples[4]) {
     uint16_t running_sum = 0;
@@ -354,7 +358,7 @@ static uint16_t filter_sample(uint32_t pdm_samples[4]) {
                 filter_ptr++;
                 pdm_sample <<= 1;
             }
-            )
+            );
     }
     return running_sum;
 }
diff --git a/ports/atmel-samd/mpconfigport.mk b/ports/atmel-samd/mpconfigport.mk
index 1929e146d..17e3995bf 100644
--- a/ports/atmel-samd/mpconfigport.mk
+++ b/ports/atmel-samd/mpconfigport.mk
@@ -29,6 +29,10 @@ ifndef CIRCUITPY_AUDIOMP3
 CIRCUITPY_AUDIOMP3 = 0
 endif
 
+ifndef CIRCUITPY_BUILTINS_POW3
+CIRCUITPY_BUILTINS_POW3 = 0
+endif
+
 ifndef CIRCUITPY_FREQUENCYIO
 CIRCUITPY_FREQUENCYIO = 0
 endif
diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile
index 55d6e91d4..0b5aa448a 100644
--- a/ports/esp32s2/Makefile
+++ b/ports/esp32s2/Makefile
@@ -104,6 +104,8 @@ INC += -isystem esp-idf/components/soc/soc/include
 INC += -isystem esp-idf/components/soc/soc/esp32s2/include
 INC += -isystem esp-idf/components/heap/include
 INC += -isystem esp-idf/components/esp_system/include
+INC += -isystem esp-idf/components/spi_flash/include
+INC += -isystem esp-idf/components/nvs_flash/include
 INC += -I$(BUILD)/esp-idf/config
 
 CFLAGS += -DHAVE_CONFIG_H \
@@ -188,6 +190,7 @@ SRC_C += \
 	lib/utils/pyexec.c \
 	lib/utils/stdout_helpers.c \
 	lib/utils/sys_stdio_mphal.c \
+	peripherals/timer.c \
 	peripherals/pcnt.c \
 	peripherals/pins.c \
 	peripherals/rmt.c \
diff --git a/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c
index 40c9e91e4..0cefb6dfb 100644
--- a/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c
+++ b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c
@@ -16,11 +16,19 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_EPD_CS), MP_ROM_PTR(&pin_GPIO8) },
 
     { MP_ROM_QSTR(MP_QSTR_BUTTON_A), MP_ROM_PTR(&pin_GPIO15) },
+    { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO15) },
+
     { MP_ROM_QSTR(MP_QSTR_BUTTON_B), MP_ROM_PTR(&pin_GPIO14) },
+    { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO14) },
+
     { MP_ROM_QSTR(MP_QSTR_BUTTON_C), MP_ROM_PTR(&pin_GPIO12) },
+    { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO12) },
+
     { MP_ROM_QSTR(MP_QSTR_BUTTON_D), MP_ROM_PTR(&pin_GPIO11) },
+    { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO11) },
 
     { MP_ROM_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_GPIO3) },
+    { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO3) },
 
     { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_GPIO4) },
     { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_GPIO4) },
@@ -36,6 +44,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_NEOPIXEL_POWER), MP_ROM_PTR(&pin_GPIO21) },
 
     { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO1) },
+    { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO1) },
 
     { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
     { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
diff --git a/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c
new file mode 100644
index 000000000..12d612abb
--- /dev/null
+++ b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c
@@ -0,0 +1,193 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "shared-bindings/frequencyio/FrequencyIn.h"
+
+#include "py/runtime.h"
+
+static void IRAM_ATTR pcnt_overflow_handler(void *self_in) {
+    frequencyio_frequencyin_obj_t * self = self_in;
+    // reset counter
+    pcnt_counter_clear(self->unit);
+
+    // increase multiplier
+    self->multiplier++;
+
+    // reset interrupt
+    PCNT.int_clr.val = BIT(self->unit);
+}
+
+static void IRAM_ATTR timer_interrupt_handler(void *self_in) {
+    frequencyio_frequencyin_obj_t * self = self_in;
+    // get counter value
+    int16_t count;
+    pcnt_get_counter_value(self->unit, &count);
+    self->frequency = ((count / 2.0) + (self->multiplier * INT16_MAX / 4.0)) / (self->capture_period);
+
+    // reset multiplier
+    self->multiplier = 0;
+
+    // reset counter
+    pcnt_counter_clear(self->unit);
+
+    // reset interrupt
+    timg_dev_t *device = self->timer.group ? &(TIMERG1) : &(TIMERG0);
+    if (self->timer.idx) {
+        device->int_clr.t1 = 1;
+    } else {
+        device->int_clr.t0 = 1;
+    }
+    device->hw_timer[self->timer.idx].config.alarm_en = 1;
+}
+
+static void init_pcnt(frequencyio_frequencyin_obj_t* self) {
+    // Prepare configuration for the PCNT unit
+    const pcnt_config_t pcnt_config = {
+        // Set PCNT input signal and control GPIOs
+        .pulse_gpio_num = self->pin,
+        .ctrl_gpio_num = PCNT_PIN_NOT_USED,
+        .channel = PCNT_CHANNEL_0,
+        // What to do on the positive / negative edge of pulse input?
+        .pos_mode = PCNT_COUNT_INC,  // count both rising and falling edges
+        .neg_mode = PCNT_COUNT_INC,
+        // Set counter limit
+        .counter_h_lim = INT16_MAX,
+        .counter_l_lim = 0,
+    };
+
+    // initialize PCNT
+    const int8_t unit = peripherals_pcnt_init(pcnt_config);
+    if (unit == -1) {
+        mp_raise_RuntimeError(translate("All PCNT units in use"));
+    }
+
+    // set the GPIO back to high-impedance, as pcnt_unit_config sets it as pull-up
+    gpio_set_pull_mode(self->pin, GPIO_FLOATING);
+
+    self->unit = (pcnt_unit_t)unit;
+
+    // enable pcnt interrupt
+    pcnt_event_enable(self->unit, PCNT_EVT_H_LIM);
+    pcnt_isr_register(pcnt_overflow_handler, (void *)self, ESP_INTR_FLAG_IRAM, &self->handle);
+    pcnt_intr_enable(self->unit);
+}
+
+static void init_timer(frequencyio_frequencyin_obj_t* self) {
+    // Prepare configuration for the timer module
+    const timer_config_t config = {
+        .alarm_en = true,
+        .counter_en = false,
+        .intr_type = TIMER_INTR_LEVEL,
+        .counter_dir = TIMER_COUNT_UP,
+        .auto_reload = true,
+        .divider = 80            // 1 us per tick
+    };
+
+    // initialize Timer
+    peripherals_timer_init(&config, &self->timer);
+    if (self->timer.idx == TIMER_MAX || self->timer.group == TIMER_GROUP_MAX) {
+        mp_raise_RuntimeError(translate("All timers in use"));
+    }
+
+    timer_idx_t idx = self->timer.idx;
+    timer_group_t group = self->timer.group;
+
+    // enable timer interrupt
+    timer_set_alarm_value(group, idx, self->capture_period * 1000000);
+    timer_isr_register(group, idx, timer_interrupt_handler, (void *)self, ESP_INTR_FLAG_IRAM, &self->handle);
+    timer_enable_intr(group, idx);
+
+    // start timer
+    timer_start(self->timer.group, self->timer.idx);
+}
+
+void common_hal_frequencyio_frequencyin_construct(frequencyio_frequencyin_obj_t* self,
+        const mcu_pin_obj_t* pin, const uint16_t capture_period) {
+    if ((capture_period == 0) || (capture_period > 500)) {
+        mp_raise_ValueError(translate("Invalid capture period. Valid range: 1 - 500"));
+    }
+
+    self->pin = pin->number;
+    self->handle = NULL;
+    self->multiplier = 0;
+    self->capture_period = capture_period;
+
+    // initialize pcnt and timer
+    init_pcnt(self);
+    init_timer(self);
+
+    claim_pin(pin);
+}
+
+bool common_hal_frequencyio_frequencyin_deinited(frequencyio_frequencyin_obj_t* self) {
+    return self->unit == PCNT_UNIT_MAX;
+}
+
+void common_hal_frequencyio_frequencyin_deinit(frequencyio_frequencyin_obj_t* self) {
+    if (common_hal_frequencyio_frequencyin_deinited(self)) {
+        return;
+    }
+    reset_pin_number(self->pin);
+    peripherals_pcnt_deinit(&self->unit);
+    peripherals_timer_deinit(&self->timer);
+    if (self->handle) {
+        esp_intr_free(self->handle);
+        self->handle = NULL;
+    }
+}
+
+uint32_t common_hal_frequencyio_frequencyin_get_item(frequencyio_frequencyin_obj_t* self) {
+    return self->frequency;
+}
+
+void common_hal_frequencyio_frequencyin_pause(frequencyio_frequencyin_obj_t* self) {
+    pcnt_counter_pause(self->unit);
+    timer_pause(self->timer.group, self->timer.idx);
+}
+
+void common_hal_frequencyio_frequencyin_resume(frequencyio_frequencyin_obj_t* self) {
+    pcnt_counter_resume(self->unit);
+    timer_start(self->timer.group, self->timer.idx);
+}
+
+void common_hal_frequencyio_frequencyin_clear(frequencyio_frequencyin_obj_t* self) {
+    self->frequency = 0;
+    pcnt_counter_clear(self->unit);
+    timer_set_counter_value(self->timer.group, self->timer.idx, 0);
+}
+
+uint16_t common_hal_frequencyio_frequencyin_get_capture_period(frequencyio_frequencyin_obj_t *self) {
+    return self->capture_period;
+}
+
+void common_hal_frequencyio_frequencyin_set_capture_period(frequencyio_frequencyin_obj_t *self, uint16_t capture_period) {
+    if ((capture_period == 0) || (capture_period > 500)) {
+        mp_raise_ValueError(translate("Invalid capture period. Valid range: 1 - 500"));
+    }
+    self->capture_period = capture_period;
+    common_hal_frequencyio_frequencyin_clear(self);
+    timer_set_alarm_value(self->timer.group, self->timer.idx, capture_period * 1000000);
+}
diff --git a/ports/esp32s2/common-hal/frequencyio/FrequencyIn.h b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.h
new file mode 100644
index 000000000..cf9d2ae53
--- /dev/null
+++ b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.h
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_FREQUENCYIO_FREQUENCYIN_H
+#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_FREQUENCYIO_FREQUENCYIN_H
+
+#include "py/obj.h"
+#include "peripherals/pcnt.h"
+#include "peripherals/timer.h"
+
+typedef struct {
+    mp_obj_base_t base;
+    pcnt_unit_t unit;
+    timer_index_t timer;
+    intr_handle_t handle;
+    uint8_t pin;
+    uint8_t multiplier;
+    uint32_t frequency;
+    uint16_t capture_period;
+} frequencyio_frequencyin_obj_t;
+
+#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_FREQUENCYIO_FREQUENCYIN_H
diff --git a/ports/esp32s2/common-hal/frequencyio/__init__.c b/ports/esp32s2/common-hal/frequencyio/__init__.c
new file mode 100644
index 000000000..487814bd0
--- /dev/null
+++ b/ports/esp32s2/common-hal/frequencyio/__init__.c
@@ -0,0 +1 @@
+// No ferquencyio module functions.
diff --git a/ports/esp32s2/common-hal/microcontroller/__init__.c b/ports/esp32s2/common-hal/microcontroller/__init__.c
index e5cfc7eef..05f26c3fe 100644
--- a/ports/esp32s2/common-hal/microcontroller/__init__.c
+++ b/ports/esp32s2/common-hal/microcontroller/__init__.c
@@ -35,6 +35,7 @@
 #include "shared-bindings/microcontroller/__init__.h"
 #include "shared-bindings/microcontroller/Pin.h"
 #include "shared-bindings/microcontroller/Processor.h"
+#include "shared-bindings/nvm/ByteArray.h"
 
 #include "supervisor/filesystem.h"
 #include "supervisor/shared/safe_mode.h"
@@ -42,7 +43,7 @@
 #include "freertos/FreeRTOS.h"
 
 void common_hal_mcu_delay_us(uint32_t delay) {
-
+    mp_hal_delay_us(delay);
 }
 
 volatile uint32_t nesting_count = 0;
@@ -85,6 +86,17 @@ const mcu_processor_obj_t common_hal_mcu_processor_obj = {
     },
 };
 
+#if CIRCUITPY_INTERNAL_NVM_SIZE > 0
+// The singleton nvm.ByteArray object.
+const nvm_bytearray_obj_t common_hal_mcu_nvm_obj = {
+    .base = {
+        .type = &nvm_bytearray_type,
+    },
+    .start_address = (uint8_t*) CIRCUITPY_INTERNAL_NVM_START_ADDR,
+    .len = CIRCUITPY_INTERNAL_NVM_SIZE,
+};
+#endif
+
 #if CIRCUITPY_WATCHDOG
 // The singleton watchdog.WatchDogTimer object.
 watchdog_watchdogtimer_obj_t common_hal_mcu_watchdogtimer_obj = {
diff --git a/ports/esp32s2/common-hal/nvm/ByteArray.c b/ports/esp32s2/common-hal/nvm/ByteArray.c
new file mode 100644
index 000000000..71321e7e6
--- /dev/null
+++ b/ports/esp32s2/common-hal/nvm/ByteArray.c
@@ -0,0 +1,97 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "common-hal/nvm/ByteArray.h"
+
+#include "py/runtime.h"
+#include "nvs_flash.h"
+
+uint32_t common_hal_nvm_bytearray_get_length(nvm_bytearray_obj_t *self) {
+    return self->len;
+}
+
+static void get_nvs_handle(nvs_handle_t * nvs_handle) {
+    // Initialize NVS
+    esp_err_t err = nvs_flash_init();
+    if (err == ESP_ERR_NVS_NO_FREE_PAGES || err == ESP_ERR_NVS_NEW_VERSION_FOUND) {
+        // NVS partition was truncated and needs to be erased
+        // Retry nvs_flash_init
+        ESP_ERROR_CHECK(nvs_flash_erase());
+        err = nvs_flash_init();
+    }
+    ESP_ERROR_CHECK(err);
+
+    // Open NVS handle
+    if (nvs_open("CPY", NVS_READWRITE, nvs_handle) != ESP_OK) {
+        mp_raise_RuntimeError(translate("NVS Error"));
+    }
+}
+
+bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self,
+        uint32_t start_index, uint8_t* values, uint32_t len) {
+    char index[9];
+
+    // start nvs
+    nvs_handle_t handle;
+    get_nvs_handle(&handle);
+
+    // stage flash changes
+    for (uint32_t i = 0; i < len; i++) {
+        sprintf(index, "%i", start_index + i);
+        if (nvs_set_u8(handle, (const char *)index, values[i]) != ESP_OK) {
+            return false;
+        }
+    }
+
+    // commit flash changes
+    if (nvs_commit(handle) != ESP_OK) {
+        return false;
+    }
+
+    // close nvs
+    nvs_close(handle);
+    return true;
+}
+
+void common_hal_nvm_bytearray_get_bytes(nvm_bytearray_obj_t *self,
+        uint32_t start_index, uint32_t len, uint8_t* values) {
+    char index[9];
+
+    // start nvs
+    nvs_handle_t handle;
+    get_nvs_handle(&handle);
+
+    // get from flash
+    for (uint32_t i = 0; i < len; i++) {
+        sprintf(index, "%i", start_index + i);
+        if (nvs_get_u8(handle, (const char *)index, &values[i]) != ESP_OK) {
+            mp_raise_RuntimeError(translate("NVS Error"));
+        }
+    }
+
+    // close nvs
+    nvs_close(handle);
+}
diff --git a/ports/esp32s2/common-hal/nvm/ByteArray.h b/ports/esp32s2/common-hal/nvm/ByteArray.h
new file mode 100644
index 000000000..44b63d724
--- /dev/null
+++ b/ports/esp32s2/common-hal/nvm/ByteArray.h
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_NVM_BYTEARRAY_H
+#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_NVM_BYTEARRAY_H
+
+#include "py/obj.h"
+
+typedef struct {
+    mp_obj_base_t base;
+    uint8_t* start_address;
+    uint32_t len;
+} nvm_bytearray_obj_t;
+
+#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_NVM_BYTEARRAY_H
diff --git a/ports/esp32s2/common-hal/nvm/__init__.c b/ports/esp32s2/common-hal/nvm/__init__.c
new file mode 100644
index 000000000..1b702a158
--- /dev/null
+++ b/ports/esp32s2/common-hal/nvm/__init__.c
@@ -0,0 +1 @@
+// No nvm module functions.
diff --git a/ports/esp32s2/common-hal/ps2io/Ps2.c b/ports/esp32s2/common-hal/ps2io/Ps2.c
new file mode 100644
index 000000000..003f0d827
--- /dev/null
+++ b/ports/esp32s2/common-hal/ps2io/Ps2.c
@@ -0,0 +1,392 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "common-hal/ps2io/Ps2.h"
+
+#include "supervisor/port.h"
+#include "shared-bindings/microcontroller/__init__.h"
+
+#define STATE_IDLE 0
+#define STATE_RECV 1
+#define STATE_RECV_PARITY 2
+#define STATE_RECV_STOP 3
+#define STATE_RECV_ERR 10
+
+#define ERROR_STARTBIT 0x01
+#define ERROR_TIMEOUT 0x02
+#define ERROR_PARITY 0x04
+#define ERROR_STOPBIT 0x08
+#define ERROR_BUFFER 0x10
+
+#define ERROR_TX_CLKLO 0x100
+#define ERROR_TX_CLKHI 0x200
+#define ERROR_TX_ACKDATA 0x400
+#define ERROR_TX_ACKCLK 0x800
+#define ERROR_TX_RTS 0x1000
+#define ERROR_TX_NORESP 0x2000
+
+void ps2_reset(void) {
+    gpio_uninstall_isr_service();
+}
+
+static void delay_us(uint32_t t) {
+    common_hal_mcu_delay_us(t);
+}
+
+/* interrupt handling */
+
+static void IRAM_ATTR ps2_interrupt_handler(void *self_in) {
+    // Grab the current time first.
+    uint64_t current_tick = port_get_raw_ticks(NULL);
+
+    ps2io_ps2_obj_t * self = self_in;
+    int data_bit = gpio_get_level(self->data_pin) ? 1 : 0;
+
+    // test for timeout
+    if (self->state != STATE_IDLE) {
+        int64_t diff_ms = current_tick - self->last_raw_ticks;
+        if (diff_ms > 1) { // a.k.a. > 1.001ms
+            self->last_errors |= ERROR_TIMEOUT;
+            self->state = STATE_IDLE;
+        }
+    }
+
+    self->last_raw_ticks = current_tick;
+
+    if (self->state == STATE_IDLE) {
+        self->bits = 0;
+        self->parity = false;
+        self->bitcount = 0;
+        self->state = STATE_RECV;
+        if (data_bit) {
+            // start bit should be 0
+            self->last_errors |= ERROR_STARTBIT;
+            self->state = STATE_RECV_ERR;
+                } else {
+            self->state = STATE_RECV;
+        }
+
+    } else if (self->state == STATE_RECV) {
+        if (data_bit) {
+            self->bits |= data_bit << self->bitcount;
+            self->parity = !self->parity;
+        }
+        ++self->bitcount;
+        if (self->bitcount >= 8) {
+            self->state = STATE_RECV_PARITY;
+        }
+
+    } else if (self->state == STATE_RECV_PARITY) {
+        ++self->bitcount;
+        if (data_bit) {
+            self->parity = !self->parity;
+        }
+        if (!self->parity) {
+            self->last_errors |= ERROR_PARITY;
+            self->state = STATE_RECV_ERR;
+        } else {
+            self->state = STATE_RECV_STOP;
+        }
+
+    } else if (self->state == STATE_RECV_STOP) {
+        ++self->bitcount;
+        if (! data_bit) {
+            self->last_errors |= ERROR_STOPBIT;
+        } else if (self->waiting_cmd_response) {
+            self->cmd_response = self->bits;
+            self->waiting_cmd_response = false;
+        } else if (self->bufcount >= sizeof(self->buffer)) {
+            self->last_errors |= ERROR_BUFFER;
+        } else {
+            self->buffer[self->bufposw] = self->bits;
+            self->bufposw = (self->bufposw + 1) % sizeof(self->buffer);
+            self->bufcount++;
+        }
+        self->state = STATE_IDLE;
+
+    } else if (self->state == STATE_RECV_ERR) {
+        // just count the bits until idle
+        if (++self->bitcount >= 10) {
+            self->state = STATE_IDLE;
+        }
+    }
+}
+
+static void enable_interrupt(ps2io_ps2_obj_t* self) {
+    // turn on falling edge interrupt
+    gpio_install_isr_service(ESP_INTR_FLAG_IRAM);
+    gpio_set_intr_type(self->clk_pin, GPIO_INTR_NEGEDGE);
+    gpio_isr_handler_add(self->clk_pin, ps2_interrupt_handler, (void*)self);
+}
+
+static void disable_interrupt(ps2io_ps2_obj_t* self) {
+    // turn off fallling edge interrupt
+    gpio_isr_handler_remove(self->clk_pin);
+}
+
+static void resume_interrupt(ps2io_ps2_obj_t* self) {
+    self->state = STATE_IDLE;
+    gpio_isr_handler_add(self->clk_pin, ps2_interrupt_handler, (void*)self);
+}
+
+/* gpio handling */
+
+static void clk_hi(ps2io_ps2_obj_t* self) {
+    // external pull-up
+    gpio_set_direction(self->clk_pin, GPIO_MODE_INPUT);
+}
+
+static bool wait_clk_lo(ps2io_ps2_obj_t* self, uint32_t us) {
+    clk_hi(self);
+    delay_us(1);
+    while (gpio_get_level(self->clk_pin) && us) {
+        --us;
+        delay_us(1);
+    }
+    return us;
+}
+
+static bool wait_clk_hi(ps2io_ps2_obj_t* self, uint32_t us) {
+    clk_hi(self);
+    delay_us(1);
+    while (!gpio_get_level(self->clk_pin) && us) {
+        --us;
+        delay_us(1);
+    }
+    return us;
+}
+
+static void clk_lo(ps2io_ps2_obj_t* self) {
+    gpio_set_direction(self->clk_pin, GPIO_MODE_OUTPUT);
+    gpio_set_level(self->clk_pin, 0);
+}
+
+static void data_hi(ps2io_ps2_obj_t* self) {
+    // external pull-up
+    gpio_set_direction(self->data_pin, GPIO_MODE_INPUT);
+}
+
+static bool wait_data_lo(ps2io_ps2_obj_t* self, uint32_t us) {
+    data_hi(self);
+    delay_us(1);
+    while (gpio_get_level(self->data_pin) && us) {
+        --us;
+        delay_us(1);
+    }
+    return us;
+}
+
+static bool wait_data_hi(ps2io_ps2_obj_t* self, uint32_t us) {
+    data_hi(self);
+    delay_us(1);
+    while (!gpio_get_level(self->data_pin) && us) {
+        --us;
+        delay_us(1);
+    }
+    return us;
+}
+
+static void data_lo(ps2io_ps2_obj_t* self) {
+    gpio_set_direction(self->data_pin, GPIO_MODE_OUTPUT);
+    gpio_set_level(self->data_pin, 0);
+}
+
+static void idle(ps2io_ps2_obj_t* self) {
+    clk_hi(self);
+    data_hi(self);
+}
+
+static void inhibit(ps2io_ps2_obj_t* self) {
+    clk_lo(self);
+    data_hi(self);
+}
+
+/* ps2io module functions */
+
+void common_hal_ps2io_ps2_construct(ps2io_ps2_obj_t* self,
+        const mcu_pin_obj_t* data_pin, const mcu_pin_obj_t* clk_pin) {
+    self->clk_pin = (gpio_num_t)clk_pin->number;
+    self->data_pin = (gpio_num_t)data_pin->number;
+    self->state = STATE_IDLE;
+    self->bufcount = 0;
+    self->bufposr = 0;
+    self->bufposw = 0;
+    self->waiting_cmd_response = false;
+
+    idle(self);
+    enable_interrupt(self);
+
+    claim_pin(clk_pin);
+    claim_pin(data_pin);
+}
+
+bool common_hal_ps2io_ps2_deinited(ps2io_ps2_obj_t* self) {
+    return self->clk_pin == GPIO_NUM_MAX;
+}
+
+void common_hal_ps2io_ps2_deinit(ps2io_ps2_obj_t* self) {
+    if (common_hal_ps2io_ps2_deinited(self)) {
+        return;
+    }
+    gpio_uninstall_isr_service();
+    reset_pin_number(self->clk_pin);
+    reset_pin_number(self->data_pin);
+    self->clk_pin = GPIO_NUM_MAX;
+    self->data_pin = GPIO_NUM_MAX;
+}
+
+uint16_t common_hal_ps2io_ps2_get_len(ps2io_ps2_obj_t* self) {
+    return self->bufcount;
+}
+
+int16_t common_hal_ps2io_ps2_popleft(ps2io_ps2_obj_t* self) {
+    common_hal_mcu_disable_interrupts();
+    if (self->bufcount <= 0) {
+        common_hal_mcu_enable_interrupts();
+        return -1;
+    }
+    uint8_t b = self->buffer[self->bufposr];
+    self->bufposr = (self->bufposr + 1) % sizeof(self->buffer);
+    self->bufcount -= 1;
+    common_hal_mcu_enable_interrupts();
+    return b;
+}
+
+uint16_t common_hal_ps2io_ps2_clear_errors(ps2io_ps2_obj_t* self) {
+    common_hal_mcu_disable_interrupts();
+    uint16_t errors = self->last_errors;
+    self->last_errors = 0;
+    common_hal_mcu_enable_interrupts();
+    return errors;
+}
+
+// Based upon TMK implementation of PS/2 protocol
+// https://github.com/tmk/tmk_keyboard/blob/master/tmk_core/protocol/ps2_interrupt.c
+
+int16_t common_hal_ps2io_ps2_sendcmd(ps2io_ps2_obj_t* self, uint8_t b) {
+    disable_interrupt(self);
+
+    /* terminate a transmission if we have */
+    inhibit(self);
+    delay_us(100);
+
+    /* RTS and start bit */
+    data_lo(self);
+    clk_hi(self);
+    if (!wait_clk_lo(self, 10000)) {
+        self->last_errors |= ERROR_TX_RTS;
+        goto ERROR;
+    }
+
+    bool parity = true;
+    for (uint8_t i = 0; i < 8; i++) {
+        delay_us(15);
+        if (b & (1 << i)) {
+            parity = !parity;
+            data_hi(self);
+        } else {
+            data_lo(self);
+        }
+        if (!wait_clk_hi(self, 50)) {
+            self->last_errors |= ERROR_TX_CLKHI;
+            goto ERROR;
+        }
+        if (!wait_clk_lo(self, 50)) {
+            self->last_errors |= ERROR_TX_CLKLO;
+            goto ERROR;
+        }
+    }
+
+    /* Parity bit */
+    delay_us(15);
+    if (parity) {
+        data_hi(self);
+    } else {
+        data_lo(self);
+    }
+    if (!wait_clk_hi(self, 50)) {
+        self->last_errors |= ERROR_TX_CLKHI;
+        goto ERROR;
+    }
+    if (!wait_clk_lo(self, 50)) {
+        self->last_errors |= ERROR_TX_CLKLO;
+        goto ERROR;
+    }
+
+    /* Stop bit */
+    delay_us(15);
+    data_hi(self);
+
+    /* Ack */
+    if (!wait_data_lo(self, 50)) {
+        self->last_errors |= ERROR_TX_ACKDATA;
+        goto ERROR;
+    }
+    if (!wait_clk_lo(self, 50)) {
+        self->last_errors |= ERROR_TX_ACKCLK;
+        goto ERROR;
+    }
+
+    /* wait for idle state */
+    if (!wait_clk_hi(self, 50)) {
+        self->last_errors |= ERROR_TX_ACKCLK;
+        goto ERROR;
+    }
+    if (!wait_data_hi(self, 50)) {
+        self->last_errors |= ERROR_TX_ACKDATA;
+        goto ERROR;
+    }
+
+    /* Wait for response byte */
+    self->waiting_cmd_response = true;
+    idle(self);
+    resume_interrupt(self);
+
+    for (int i = 0; i < 25; ++i) {
+        delay_us(1000);
+        common_hal_mcu_disable_interrupts();
+        bool has_response = !self->waiting_cmd_response;
+        uint8_t response = self->cmd_response;
+        common_hal_mcu_enable_interrupts();
+
+        if (has_response) {
+            return response;
+        }
+    }
+
+    /* No response */
+    common_hal_mcu_disable_interrupts();
+    self->waiting_cmd_response = false;
+    self->last_errors |= ERROR_TX_NORESP;
+    common_hal_mcu_enable_interrupts();
+    return -1;
+
+    /* Other errors */
+ERROR:
+    idle(self);
+    resume_interrupt(self);
+    return -1;
+}
diff --git a/ports/esp32s2/common-hal/ps2io/Ps2.h b/ports/esp32s2/common-hal/ps2io/Ps2.h
new file mode 100644
index 000000000..497952b25
--- /dev/null
+++ b/ports/esp32s2/common-hal/ps2io/Ps2.h
@@ -0,0 +1,60 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_PS2IO_PS2_H
+#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_PS2IO_PS2_H
+
+#include "common-hal/microcontroller/Pin.h"
+
+#include "py/obj.h"
+#include "driver/gpio.h"
+
+typedef struct {
+    mp_obj_base_t base;
+    gpio_num_t clk_pin;
+    gpio_num_t data_pin;
+
+    uint8_t state;
+    uint64_t last_raw_ticks;
+
+    uint16_t bits;
+    bool parity;
+    uint8_t bitcount;
+
+    uint8_t buffer[16];
+    uint8_t bufcount;
+    uint8_t bufposr;
+    uint8_t bufposw;
+
+    uint16_t last_errors;
+
+    bool waiting_cmd_response;
+    uint8_t cmd_response;
+} ps2io_ps2_obj_t;
+
+void ps2_reset(void);
+
+#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_PS2IO_PS2_H
diff --git a/ports/esp32s2/common-hal/ps2io/__init__.c b/ports/esp32s2/common-hal/ps2io/__init__.c
new file mode 100644
index 000000000..ba4b4249f
--- /dev/null
+++ b/ports/esp32s2/common-hal/ps2io/__init__.c
@@ -0,0 +1 @@
+// No ps2io module functions.
diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c
index 1945da207..f7c431a56 100644
--- a/ports/esp32s2/common-hal/wifi/Radio.c
+++ b/ports/esp32s2/common-hal/wifi/Radio.c
@@ -142,6 +142,13 @@ wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t
     } else {
         config->sta.bssid_set = 0;
     }
+    // If channel is 0 (default/unset) and BSSID is not given, do a full scan instead of fast scan
+    // This will ensure that the best AP in range is chosen automatically
+    if ((config->sta.bssid_set == 0) && (config->sta.channel == 0)) {
+        config->sta.scan_method = WIFI_ALL_CHANNEL_SCAN;
+    } else {
+        config->sta.scan_method = WIFI_FAST_SCAN;
+    }
     esp_wifi_set_config(ESP_IF_WIFI_STA, config);
     self->starting_retries = 5;
     self->retries_left = 5;
diff --git a/ports/esp32s2/common-hal/wifi/__init__.c b/ports/esp32s2/common-hal/wifi/__init__.c
index f53e68fc2..e06038c22 100644
--- a/ports/esp32s2/common-hal/wifi/__init__.c
+++ b/ports/esp32s2/common-hal/wifi/__init__.c
@@ -59,6 +59,7 @@ static void event_handler(void* arg, esp_event_base_t event_base,
                 ESP_EARLY_LOGW(TAG, "reason %d 0x%02x", reason, reason);
                 if (radio->retries_left > 0 &&
                         (reason == WIFI_REASON_AUTH_EXPIRE ||
+                         reason == WIFI_REASON_NOT_AUTHED ||
                          reason == WIFI_REASON_ASSOC_EXPIRE ||
                          reason == WIFI_REASON_CONNECTION_FAIL ||
                          reason == WIFI_REASON_4WAY_HANDSHAKE_TIMEOUT)) {
diff --git a/ports/esp32s2/mpconfigport.h b/ports/esp32s2/mpconfigport.h
index cec8dd35d..db7393d8e 100644
--- a/ports/esp32s2/mpconfigport.h
+++ b/ports/esp32s2/mpconfigport.h
@@ -28,7 +28,6 @@
 #ifndef ESP32S2_MPCONFIGPORT_H__
 #define ESP32S2_MPCONFIGPORT_H__
 
-#define CIRCUITPY_INTERNAL_NVM_SIZE         (0)
 #define MICROPY_NLR_THUMB                   (0)
 
 #define MICROPY_PY_UJSON                    (1)
@@ -36,11 +35,15 @@
 
 #include "py/circuitpy_mpconfig.h"
 
-
 #define MICROPY_PORT_ROOT_POINTERS \
 	CIRCUITPY_COMMON_ROOT_POINTERS
 #define MICROPY_NLR_SETJMP                  (1)
 #define CIRCUITPY_DEFAULT_STACK_SIZE        0x6000
 
+#define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x9000)
+
+#ifndef CIRCUITPY_INTERNAL_NVM_SIZE
+#define CIRCUITPY_INTERNAL_NVM_SIZE (20 * 1024)
+#endif
 
 #endif  // __INCLUDED_ESP32S2_MPCONFIGPORT_H
diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk
index 335d2caf7..8ba5b0f99 100644
--- a/ports/esp32s2/mpconfigport.mk
+++ b/ports/esp32s2/mpconfigport.mk
@@ -18,16 +18,20 @@ CIRCUITPY_AUDIOBUSIO = 0
 CIRCUITPY_AUDIOIO = 0
 CIRCUITPY_CANIO = 1
 CIRCUITPY_COUNTIO = 1
-CIRCUITPY_FREQUENCYIO = 0
+CIRCUITPY_FREQUENCYIO = 1
 CIRCUITPY_I2CPERIPHERAL = 0
 CIRCUITPY_ROTARYIO = 1
-CIRCUITPY_NVM = 0
+CIRCUITPY_NVM = 1
 # We don't have enough endpoints to include MIDI.
 CIRCUITPY_USB_MIDI = 0
 CIRCUITPY_WIFI = 1
 CIRCUITPY_WATCHDOG ?= 1
 CIRCUITPY_ESPIDF = 1
 
+ifndef CIRCUITPY_PS2IO
+CIRCUITPY_PS2IO = 1
+endif
+
 ifndef CIRCUITPY_TOUCHIO_USE_NATIVE
 CIRCUITPY_TOUCHIO_USE_NATIVE = 1
 endif
diff --git a/ports/esp32s2/peripherals/timer.c b/ports/esp32s2/peripherals/timer.c
new file mode 100644
index 000000000..0ae140387
--- /dev/null
+++ b/ports/esp32s2/peripherals/timer.c
@@ -0,0 +1,76 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "peripherals/timer.h"
+
+#define TIMER_FREE 1
+#define TIMER_BUSY 0
+
+static uint8_t timer_state[2][2];
+
+void peripherals_timer_reset(void) {
+    timer_index_t timer;
+    for (uint8_t i = 0; i < 2; i++) {
+        for (uint8_t j = 0; j < 2; j++) {
+            if (timer_state[i][j] == TIMER_BUSY) {
+                timer.idx = (timer_idx_t)j;
+                timer.group = (timer_group_t)i;
+                timer_state[i][j] = TIMER_FREE;
+                peripherals_timer_deinit(&timer);
+            }
+        }
+    }
+}
+
+void peripherals_timer_init(const timer_config_t * config, timer_index_t * timer) {
+    bool break_loop = false;
+
+    // get free timer
+    for (uint8_t i = 0; i < 2; i++) {
+        for (uint8_t j = 0; j < 2; j++) {
+            if (timer_state[i][j] == TIMER_FREE) {
+                timer->idx = (timer_idx_t)j;
+                timer->group = (timer_group_t)i;
+                timer_state[i][j] = TIMER_BUSY;
+                break_loop = true;
+                break;
+            } else if (i == 1 && j == 1) {
+                timer->idx = TIMER_MAX;
+                timer->group = TIMER_GROUP_MAX;
+                return;
+            }
+        }
+        if (break_loop) {break;}
+    }
+
+    // initialize timer module
+    timer_init(timer->group, timer->idx, config);
+    timer_set_counter_value(timer->group, timer->idx, 0);
+}
+
+void peripherals_timer_deinit(timer_index_t * timer) {
+    timer_deinit(timer->group, timer->idx);
+}
diff --git a/ports/esp32s2/peripherals/timer.h b/ports/esp32s2/peripherals/timer.h
new file mode 100644
index 000000000..8c9ebd91c
--- /dev/null
+++ b/ports/esp32s2/peripherals/timer.h
@@ -0,0 +1,41 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_PERIPHERALS_TIMER_HANDLER_H
+#define MICROPY_INCLUDED_ESP32S2_PERIPHERALS_TIMER_HANDLER_H
+
+#include "driver/timer.h"
+
+typedef struct {
+    timer_idx_t idx;
+    timer_group_t group;
+} timer_index_t;
+
+extern void peripherals_timer_init(const timer_config_t * config, timer_index_t * timer);
+extern void peripherals_timer_deinit(timer_index_t * timer);
+extern void peripherals_timer_reset(void);
+
+#endif  // MICROPY_INCLUDED_ESP32S2_PERIPHERALS_TIMER_HANDLER_H
diff --git a/ports/esp32s2/supervisor/port.c b/ports/esp32s2/supervisor/port.c
index e2defc5af..e79aa8d52 100644
--- a/ports/esp32s2/supervisor/port.c
+++ b/ports/esp32s2/supervisor/port.c
@@ -41,6 +41,7 @@
 #include "common-hal/busio/I2C.h"
 #include "common-hal/busio/SPI.h"
 #include "common-hal/busio/UART.h"
+#include "common-hal/ps2io/Ps2.h"
 #include "common-hal/pulseio/PulseIn.h"
 #include "common-hal/pwmio/PWMOut.h"
 #include "common-hal/touchio/TouchIn.h"
@@ -52,6 +53,7 @@
 
 #include "peripherals/rmt.h"
 #include "peripherals/pcnt.h"
+#include "peripherals/timer.h"
 #include "components/heap/include/esp_heap_caps.h"
 #include "components/soc/soc/esp32s2/include/soc/cache_memory.h"
 
@@ -105,6 +107,10 @@ void reset_port(void) {
     analogout_reset();
 #endif
 
+#if CIRCUITPY_PS2IO
+    ps2_reset();
+#endif
+
 #if CIRCUITPY_PULSEIO
     esp32s2_peripherals_rmt_reset();
     pulsein_reset();
@@ -124,6 +130,19 @@ void reset_port(void) {
     peripherals_pcnt_reset();
 #endif
 
+#if CIRCUITPY_FREQUENCYIO
+    peripherals_timer_reset();
+#endif
+
+#if CIRCUITPY_PULSEIO
+    esp32s2_peripherals_rmt_reset();
+    pulsein_reset();
+#endif
+
+#if CIRCUITPY_PWMIO
+    pwmout_reset();
+#endif
+
 #if CIRCUITPY_RTC
     rtc_reset();
 #endif
diff --git a/ports/stm/boards/STM32F411_nvm_nofs.ld b/ports/stm/boards/STM32F411_nvm_nofs.ld
new file mode 100644
index 000000000..e4630518c
--- /dev/null
+++ b/ports/stm/boards/STM32F411_nvm_nofs.ld
@@ -0,0 +1,27 @@
+/*
+    GNU linker script for STM32F411 with nvm and an external flash chip.
+    No space is reserved for a filesystem.
+*/
+
+/* Specify the memory areas */
+MEMORY
+{
+    FLASH (rx)          : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */
+    FLASH_ISR (rx)      : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
+    FLASH_NVM (rwx)     : ORIGIN = 0x08004000, LENGTH = 16K /* sector 1 is 16K */
+    FLASH_FIRMWARE (rx) : ORIGIN = 0x08008000, LENGTH = 480K /* sector 2,3 is 16k, sector 4 is 64K, sectors 5,6,7 are 128K */
+    RAM (xrw)           : ORIGIN = 0x20000000, LENGTH = 128K
+}
+
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 24K;
+_minimum_heap_size = 16K;
+
+/* Define the top end of the stack.  The stack is full descending so begins just
+   above last byte of RAM.  Note that EABI requires the stack to be 8-byte
+   aligned for a call. */
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* RAM extents for the garbage collector */
+_ram_start = ORIGIN(RAM);
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
diff --git a/ports/stm/boards/meowbit_v121/mpconfigboard.mk b/ports/stm/boards/meowbit_v121/mpconfigboard.mk
index c416700e3..86b0cb5ab 100644
--- a/ports/stm/boards/meowbit_v121/mpconfigboard.mk
+++ b/ports/stm/boards/meowbit_v121/mpconfigboard.mk
@@ -20,3 +20,5 @@ LD_COMMON = boards/common_default.ld
 LD_FILE = boards/STM32F401xe_boot.ld
 # For debugging - also comment BOOTLOADER_OFFSET and BOARD_VTOR_DEFER
 # LD_FILE = boards/STM32F401xe_fs.ld
+
+CIRCUITPY_ULAB = 0
diff --git a/ports/stm/boards/thunderpack/board.c b/ports/stm/boards/thunderpack_v11/board.c
index 4421970ee..4421970ee 100644
--- a/ports/stm/boards/thunderpack/board.c
+++ b/ports/stm/boards/thunderpack_v11/board.c
diff --git a/ports/stm/boards/thunderpack/mpconfigboard.h b/ports/stm/boards/thunderpack_v11/mpconfigboard.h
index c2649e255..7d4a8dff3 100644
--- a/ports/stm/boards/thunderpack/mpconfigboard.h
+++ b/ports/stm/boards/thunderpack_v11/mpconfigboard.h
@@ -23,7 +23,7 @@
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  * THE SOFTWARE.
  */
-#define MICROPY_HW_BOARD_NAME       "THUNDERPACK"
+#define MICROPY_HW_BOARD_NAME       "THUNDERPACK_v11"
 #define MICROPY_HW_MCU_NAME         "STM32F411CE"
 
 // Non-volatile memory config
diff --git a/ports/stm/boards/thunderpack/mpconfigboard.mk b/ports/stm/boards/thunderpack_v11/mpconfigboard.mk
index d303582e0..8f645068d 100644
--- a/ports/stm/boards/thunderpack/mpconfigboard.mk
+++ b/ports/stm/boards/thunderpack_v11/mpconfigboard.mk
@@ -15,3 +15,5 @@ MCU_PACKAGE = UFQFPN48
 
 LD_COMMON = boards/common_nvm.ld
 LD_FILE = boards/STM32F411_nvm.ld
+
+CIRCUITPY_ULAB = 0
diff --git a/ports/stm/boards/thunderpack/pins.c b/ports/stm/boards/thunderpack_v11/pins.c
index eed54eb3c..eed54eb3c 100644
--- a/ports/stm/boards/thunderpack/pins.c
+++ b/ports/stm/boards/thunderpack_v11/pins.c
diff --git a/ports/stm/boards/thunderpack_v12/board.c b/ports/stm/boards/thunderpack_v12/board.c
new file mode 100644
index 000000000..4421970ee
--- /dev/null
+++ b/ports/stm/boards/thunderpack_v12/board.c
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+
+void board_init(void) {
+}
+
+bool board_requests_safe_mode(void) {
+  return false;
+}
+
+void reset_board(void) {
+
+}
diff --git a/ports/stm/boards/thunderpack_v12/mpconfigboard.h b/ports/stm/boards/thunderpack_v12/mpconfigboard.h
new file mode 100644
index 000000000..fb5f389a3
--- /dev/null
+++ b/ports/stm/boards/thunderpack_v12/mpconfigboard.h
@@ -0,0 +1,57 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Lucian Copeland for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#define MICROPY_HW_BOARD_NAME       "THUNDERPACK_v12"
+#define MICROPY_HW_MCU_NAME         "STM32F411CE"
+
+// Non-volatile memory config
+#define CIRCUITPY_INTERNAL_NVM_SIZE          (0x4000)
+#define CIRCUITPY_INTERNAL_NVM_START_ADDR    (0x08004000)
+#define CIRCUITPY_INTERNAL_NVM_SECTOR        FLASH_SECTOR_1
+#define NVM_BYTEARRAY_BUFFER_SIZE            512
+
+// Flash config
+#define FLASH_SIZE                           (0x80000)
+#define FLASH_PAGE_SIZE                      (0x4000)
+#define BOARD_FLASH_SIZE                     (FLASH_SIZE - CIRCUITPY_INTERNAL_NVM_SIZE- 0x2000 - 0xC000)
+#define INTERNAL_FLASH_FILESYSTEM_SIZE       0x8000
+
+// On-board flash
+#define SPI_FLASH_MOSI_PIN          (&pin_PB15)
+#define SPI_FLASH_MISO_PIN          (&pin_PB14)
+#define SPI_FLASH_SCK_PIN           (&pin_PB13)
+#define SPI_FLASH_CS_PIN            (&pin_PB12)
+
+#define HSE_VALUE                   ((uint32_t)24000000U)
+#define BOARD_OVERWRITE_SWD         (1)
+#define BOARD_NO_VBUS_SENSE         (1)
+#define BOARD_HAS_LOW_SPEED_CRYSTAL (0)
+
+// Status LEDs
+#define MICROPY_HW_APA102_MOSI      (&pin_PB08)
+#define MICROPY_HW_APA102_SCK       (&pin_PB00)
+// I2C
+#define DEFAULT_I2C_BUS_SCL         (&pin_PB06)
+#define DEFAULT_I2C_BUS_SDA         (&pin_PB07)
diff --git a/ports/stm/boards/thunderpack_v12/mpconfigboard.mk b/ports/stm/boards/thunderpack_v12/mpconfigboard.mk
new file mode 100644
index 000000000..a2e1da101
--- /dev/null
+++ b/ports/stm/boards/thunderpack_v12/mpconfigboard.mk
@@ -0,0 +1,21 @@
+USB_VID = 0x239A
+USB_PID = 0x8071
+USB_PRODUCT = "Thunderpack STM32F411"
+USB_MANUFACTURER = "Jeremy Gillick"
+USB_DEVICES = "CDC,MSC"
+
+LONGINT_IMPL = NONE
+
+SPI_FLASH_FILESYSTEM = 1
+EXTERNAL_FLASH_DEVICE_COUNT = 1
+EXTERNAL_FLASH_DEVICES = GD25Q16C
+
+CIRCUITPY_NVM = 1
+CIRCUITPY_BLEIO_HCI = 0
+
+MCU_SERIES = F4
+MCU_VARIANT = STM32F411xE
+MCU_PACKAGE = UFQFPN48
+
+LD_COMMON = boards/common_nvm.ld
+LD_FILE = boards/STM32F411_nvm_nofs.ld
diff --git a/ports/stm/boards/thunderpack_v12/pins.c b/ports/stm/boards/thunderpack_v12/pins.c
new file mode 100644
index 000000000..1e07621ea
--- /dev/null
+++ b/ports/stm/boards/thunderpack_v12/pins.c
@@ -0,0 +1,39 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
+    { MP_ROM_QSTR(MP_QSTR_PA0), MP_ROM_PTR(&pin_PA00) },
+    { MP_ROM_QSTR(MP_QSTR_PA1), MP_ROM_PTR(&pin_PA01) },
+    { MP_ROM_QSTR(MP_QSTR_PA2), MP_ROM_PTR(&pin_PA02) },
+    { MP_ROM_QSTR(MP_QSTR_PA3), MP_ROM_PTR(&pin_PA03) },
+    { MP_ROM_QSTR(MP_QSTR_PA4), MP_ROM_PTR(&pin_PA04) },
+    { MP_ROM_QSTR(MP_QSTR_PA5), MP_ROM_PTR(&pin_PA05) },
+    { MP_ROM_QSTR(MP_QSTR_PA6), MP_ROM_PTR(&pin_PA06) },
+    { MP_ROM_QSTR(MP_QSTR_PA7), MP_ROM_PTR(&pin_PA07) },
+    { MP_ROM_QSTR(MP_QSTR_PA8), MP_ROM_PTR(&pin_PA08) },
+    { MP_ROM_QSTR(MP_QSTR_PA9), MP_ROM_PTR(&pin_PA09) },
+    { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) },
+    { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) },
+    { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) },
+
+    { MP_ROM_QSTR(MP_QSTR_PB0), MP_ROM_PTR(&pin_PB00) },
+    { MP_ROM_QSTR(MP_QSTR_PB5), MP_ROM_PTR(&pin_PB05) },
+    { MP_ROM_QSTR(MP_QSTR_PB6), MP_ROM_PTR(&pin_PB06) },
+    { MP_ROM_QSTR(MP_QSTR_PB7), MP_ROM_PTR(&pin_PB07) },
+    { MP_ROM_QSTR(MP_QSTR_PB8), MP_ROM_PTR(&pin_PB08) },
+
+    { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_PA00) },
+    { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_PA01) },
+    { MP_ROM_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_PA02) },
+    { MP_ROM_QSTR(MP_QSTR_LED4), MP_ROM_PTR(&pin_PA03) },
+
+    { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_PB04) },
+
+    { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) },
+    { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) },
+
+    { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_PB08) },
+    { MP_ROM_QSTR(MP_QSTR_APA102_SCK),  MP_ROM_PTR(&pin_PB00) },
+
+    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
diff --git a/ports/stm/common-hal/microcontroller/Pin.c b/ports/stm/common-hal/microcontroller/Pin.c
index 996513270..0e333c71c 100644
--- a/ports/stm/common-hal/microcontroller/Pin.c
+++ b/ports/stm/common-hal/microcontroller/Pin.c
@@ -35,6 +35,10 @@
 #ifdef MICROPY_HW_NEOPIXEL
 bool neopixel_in_use;
 #endif
+#if defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)
+bool apa102_sck_in_use;
+bool apa102_mosi_in_use;
+#endif
 
 #if defined(TFBGA216)
     GPIO_TypeDef * ports[] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH, GPIOI, GPIOJ, GPIOK};
@@ -66,6 +70,10 @@ void reset_all_pins(void) {
     #ifdef MICROPY_HW_NEOPIXEL
     neopixel_in_use = false;
     #endif
+    #if defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)
+    apa102_sck_in_use = false;
+    apa102_mosi_in_use = false;
+    #endif
 }
 
 // Mark pin as free and return it to a quiescent state.
@@ -89,6 +97,18 @@ void reset_pin_number(uint8_t pin_port, uint8_t pin_number) {
         return;
     }
     #endif
+    #if defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)
+    if (
+        (pin_port == MICROPY_HW_APA102_MOSI->port && pin_number == MICROPY_HW_APA102_MOSI->number)
+        || (pin_port == MICROPY_HW_APA102_SCK->port && pin_number == MICROPY_HW_APA102_MOSI->number)
+    )
+    {
+        apa102_mosi_in_use = false;
+        apa102_sck_in_use = false;
+        rgb_led_status_init();
+        return;
+    }
+    #endif
 }
 
 void never_reset_pin_number(uint8_t pin_port, uint8_t pin_number) {
@@ -123,6 +143,16 @@ bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t *pin) {
         return !neopixel_in_use;
     }
     #endif
+    #if defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)
+    if (pin == MICROPY_HW_APA102_MOSI)
+    {
+        return !apa102_mosi_in_use;
+    }
+    if (pin == MICROPY_HW_APA102_SCK)
+    {
+        return !apa102_sck_in_use;
+    }
+    #endif
 
     return pin_number_is_free(pin->port, pin->number);
 }
@@ -146,6 +176,16 @@ void common_hal_mcu_pin_claim(const mcu_pin_obj_t* pin) {
         neopixel_in_use = true;
     }
     #endif
+    #if defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)
+    if (pin == MICROPY_HW_APA102_MOSI)
+    {
+        apa102_mosi_in_use = true;
+    }
+    if (pin == MICROPY_HW_APA102_SCK)
+    {
+        apa102_sck_in_use = true;
+    }
+    #endif
 }
 
 void common_hal_mcu_pin_reset_number(uint8_t pin_no) {
diff --git a/ports/stm/common-hal/nvm/ByteArray.c b/ports/stm/common-hal/nvm/ByteArray.c
index 462d3aa9d..b7a1ff035 100644
--- a/ports/stm/common-hal/nvm/ByteArray.c
+++ b/ports/stm/common-hal/nvm/ByteArray.c
@@ -48,7 +48,7 @@ bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self,
 
     // Erase flash sector
     HAL_FLASH_Unlock();
-    __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGSERR );
+    __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR );
     FLASH_Erase_Sector(CIRCUITPY_INTERNAL_NVM_SECTOR, VOLTAGE_RANGE_3);
 
     // Write bytes to flash
diff --git a/ports/stm/supervisor/internal_flash.h b/ports/stm/supervisor/internal_flash.h
index ad5cba62d..19ae03e0b 100644
--- a/ports/stm/supervisor/internal_flash.h
+++ b/ports/stm/supervisor/internal_flash.h
@@ -41,8 +41,12 @@
 
 #ifdef STM32F411xE
 #define STM32_FLASH_SIZE 0x80000 //512KiB
-#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB
-#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08004000
+#ifndef INTERNAL_FLASH_FILESYSTEM_SIZE
+  #define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB
+#endif
+#ifndef INTERNAL_FLASH_FILESYSTEM_START_ADDR
+  #define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08004000
+#endif
 #endif
 
 #ifdef STM32F412Zx
diff --git a/ports/unix/modjni.c b/ports/unix/modjni.c
index 8ec5ae54d..82d1ccd55 100644
--- a/ports/unix/modjni.c
+++ b/ports/unix/modjni.c
@@ -102,9 +102,9 @@ STATIC void check_exception(void) {
         mp_obj_t py_e = new_jobject(exc);
         JJ1(ExceptionClear);
         if (JJ(IsInstanceOf, exc, IndexException_class)) {
-            nlr_raise(mp_obj_new_exception_arg1(&mp_type_IndexError, py_e));
+            mp_raise_arg1(&mp_type_IndexError, py_e);
         }
-        nlr_raise(mp_obj_new_exception_arg1(&mp_type_Exception, py_e));
+        mp_raise_arg1(&mp_type_Exception, py_e);
     }
 }