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authorDan Halbert <halbert@halwitz.org>2020-02-11 19:19:31 -0500
committerDan Halbert <halbert@halwitz.org>2020-02-11 19:22:14 -0500
commit2e029d55fc0396a33fcf8ac73124f571aea34eee (patch)
tree95002ac5feb5d55eee1c0776b1a6d4393006bcb0 /shared-bindings
parent8364c60eb28fa9afffb2a2fac96bd71a18faa6de (diff)
nrf: add SPIM3 support
Diffstat (limited to 'shared-bindings')
-rw-r--r--shared-bindings/busio/SPI.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/shared-bindings/busio/SPI.c b/shared-bindings/busio/SPI.c
index d1791bef3..2ae312a35 100644
--- a/shared-bindings/busio/SPI.c
+++ b/shared-bindings/busio/SPI.c
@@ -56,6 +56,13 @@
//| .. class:: SPI(clock, MOSI=None, MISO=None)
//|
//| Construct an SPI object on the given pins.
+
+//| ..note:: The SPI peripherals allocated in order of desirability, if possible,
+//| such as highest speed and not shared use first. For instance, on the nRF52840,
+//| there is a single 32MHz SPI peripheral, and multiple 8MHz peripherals,
+//| some of which may also be used for I2C. The 32MHz SPI peripheral is returned
+//| first, then the exclusive 8MHz SPI peripheral, and finally the shared 8MHz
+//| peripherals.
//|
//| .. seealso:: Using this class directly requires careful lock management.
//| Instead, use :class:`~adafruit_bus_device.spi_device.SPIDevice` to