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authorJeff Epler <jeff@adafruit.com>2021-03-15 13:50:49 -0500
committerGitHub <noreply@github.com>2021-03-15 13:50:49 -0500
commit05ed179e11599dd45a76dfb14ecf624d0ff96d68 (patch)
treea046c6d1f117814168150484ed1bf7840d3400d7 /tests/inlineasm/asmshift.py
parent3cbff45f9aac5ea2855bbc888083d356a91c80fe (diff)
parentf9b4189b4c640823dabb76de8effd2a836da2eb0 (diff)
Merge pull request #4362 from microDev1/code-formatting
Add code formatting and translations check
Diffstat (limited to 'tests/inlineasm/asmshift.py')
-rw-r--r--tests/inlineasm/asmshift.py17
1 files changed, 17 insertions, 0 deletions
diff --git a/tests/inlineasm/asmshift.py b/tests/inlineasm/asmshift.py
index 0df218734..ba4c21b3f 100644
--- a/tests/inlineasm/asmshift.py
+++ b/tests/inlineasm/asmshift.py
@@ -1,29 +1,46 @@
@micropython.asm_thumb
def lsl1(r0):
lsl(r0, r0, 1)
+
+
print(hex(lsl1(0x123)))
+
@micropython.asm_thumb
def lsl23(r0):
lsl(r0, r0, 23)
+
+
print(hex(lsl23(1)))
+
@micropython.asm_thumb
def lsr1(r0):
lsr(r0, r0, 1)
+
+
print(hex(lsr1(0x123)))
+
@micropython.asm_thumb
def lsr31(r0):
lsr(r0, r0, 31)
+
+
print(hex(lsr31(0x80000000)))
+
@micropython.asm_thumb
def asr1(r0):
asr(r0, r0, 1)
+
+
print(hex(asr1(0x123)))
+
@micropython.asm_thumb
def asr31(r0):
asr(r0, r0, 31)
+
+
print(hex(asr31(0x80000000)))