diff options
| -rw-r--r-- | ports/mimxrt10xx/common-hal/busio/SPI.c | 3 | ||||
| -rw-r--r-- | ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c | 52 |
2 files changed, 27 insertions, 28 deletions
diff --git a/ports/mimxrt10xx/common-hal/busio/SPI.c b/ports/mimxrt10xx/common-hal/busio/SPI.c index 5ff94bcf8..b262d1a46 100644 --- a/ports/mimxrt10xx/common-hal/busio/SPI.c +++ b/ports/mimxrt10xx/common-hal/busio/SPI.c @@ -95,8 +95,7 @@ static void config_periph_pin(const mcu_periph_obj_t *periph) { | IOMUXC_SW_PAD_CTL_PAD_SRE(0)); } -#define LPSPI_CLOCK_SOURCE_DIVIDER (7U) -#define LPSPI_MASTER_CLK_FREQ (CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk) / (LPSPI_CLOCK_SOURCE_DIVIDER + 1U)) +#define LPSPI_MASTER_CLK_FREQ (CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk) / (CLOCK_GetDiv(kCLOCK_LpspiDiv))) void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t *clock, const mcu_pin_obj_t *mosi, diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c index 0417f29cc..60f301668 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c @@ -33,28 +33,28 @@ LPI2C_Type *mcu_i2c_banks[] = { LPI2C1, LPI2C2, LPI2C3, LPI2C4 }; const mcu_periph_obj_t mcu_i2c_sda_list[8] = { - PERIPH_PIN(1, 0, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 0, &pin_GPIO_AD_B1_15), - PERIPH_PIN(1, 6, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 1, &pin_GPIO_EMC_03), + PERIPH_PIN(1, 6, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 0, &pin_GPIO_EMC_03), + PERIPH_PIN(1, 0, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 1, &pin_GPIO_AD_B1_15), PERIPH_PIN(2, 0, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 0, &pin_GPIO_AD_B1_09), PERIPH_PIN(2, 2, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 1, &pin_GPIO_EMC_18), - PERIPH_PIN(3, 1, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 0, &pin_GPIO_AD_B0_09), - PERIPH_PIN(3, 4, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 1, &pin_GPIO_SD_B0_01), + PERIPH_PIN(3, 4, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 0, &pin_GPIO_SD_B0_01), + PERIPH_PIN(3, 1, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 1, &pin_GPIO_AD_B0_09), PERIPH_PIN(4, 2, kIOMUXC_LPI2C4_SDA_SELECT_INPUT, 0, &pin_GPIO_EMC_10), PERIPH_PIN(4, 3, kIOMUXC_LPI2C4_SDA_SELECT_INPUT, 1, &pin_GPIO_SD_B1_03), }; const mcu_periph_obj_t mcu_i2c_scl_list[8] = { - PERIPH_PIN(1, 0, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 0, &pin_GPIO_AD_B1_14), - PERIPH_PIN(1, 6, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 1, &pin_GPIO_EMC_02), + PERIPH_PIN(1, 6, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 0, &pin_GPIO_EMC_02), + PERIPH_PIN(1, 0, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 1, &pin_GPIO_AD_B1_14), PERIPH_PIN(2, 0, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 0, &pin_GPIO_AD_B1_08), PERIPH_PIN(2, 2, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 1, &pin_GPIO_EMC_19), - PERIPH_PIN(3, 1, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 0, &pin_GPIO_AD_B0_08), - PERIPH_PIN(3, 4, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 1, &pin_GPIO_SD_B0_00), + PERIPH_PIN(3, 4, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 0, &pin_GPIO_SD_B0_00), + PERIPH_PIN(3, 1, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 1, &pin_GPIO_AD_B0_08), PERIPH_PIN(4, 2, kIOMUXC_LPI2C4_SCL_SELECT_INPUT, 0, &pin_GPIO_EMC_11), PERIPH_PIN(4, 3, kIOMUXC_LPI2C4_SCL_SELECT_INPUT, 1, &pin_GPIO_SD_B1_02), @@ -63,8 +63,8 @@ const mcu_periph_obj_t mcu_i2c_scl_list[8] = { LPSPI_Type *mcu_spi_banks[] = { LPSPI1, LPSPI2, LPSPI3, LPSPI4 }; const mcu_periph_obj_t mcu_spi_sck_list[8] = { - PERIPH_PIN(1, 1, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_B0_10), - PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 1, &pin_GPIO_SD_B0_02), + PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 0, &pin_GPIO_SD_B0_02), + PERIPH_PIN(1, 1, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 1, &pin_GPIO_AD_B0_10), PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 0, &pin_GPIO_EMC_00), PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 1, &pin_GPIO_EMC_10), @@ -77,31 +77,31 @@ const mcu_periph_obj_t mcu_spi_sck_list[8] = { }; const mcu_periph_obj_t mcu_spi_mosi_list[8] = { - PERIPH_PIN(1, 1, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_B0_13), - PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 1, &pin_GPIO_SD_B0_05), + PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 0, &pin_GPIO_SD_B0_04), + PERIPH_PIN(1, 1, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 1, &pin_GPIO_AD_B0_12), - PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_EMC_03), - PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 1, &pin_GPIO_EMC_13), - PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 2, &pin_GPIO_SD_B1_09), + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_EMC_02), + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 1, &pin_GPIO_EMC_12), + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 2, &pin_GPIO_SD_B1_08), - PERIPH_PIN(3, 2, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_B1_15), + PERIPH_PIN(3, 2, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_B1_14), - PERIPH_PIN(4, 2, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_B1_05), - PERIPH_PIN(4, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 1, &pin_GPIO_EMC_35), + PERIPH_PIN(4, 2, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_B1_04), + PERIPH_PIN(4, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 1, &pin_GPIO_EMC_34), }; const mcu_periph_obj_t mcu_spi_miso_list[8] = { - PERIPH_PIN(1, 1, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_B0_12), - PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 1, &pin_GPIO_SD_B0_04), + PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 0, &pin_GPIO_SD_B0_05), + PERIPH_PIN(1, 1, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 1, &pin_GPIO_AD_B0_13), - PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_EMC_02), - PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 1, &pin_GPIO_EMC_12), - PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 2, &pin_GPIO_SD_B1_08), + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_EMC_03), + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 1, &pin_GPIO_EMC_13), + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 2, &pin_GPIO_SD_B1_09), - PERIPH_PIN(3, 2, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_B1_14), + PERIPH_PIN(3, 2, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_B1_15), - PERIPH_PIN(4, 2, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_B1_04), - PERIPH_PIN(4, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 1, &pin_GPIO_EMC_34), + PERIPH_PIN(4, 2, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_B1_05), + PERIPH_PIN(4, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 1, &pin_GPIO_EMC_35), }; LPUART_Type *mcu_uart_banks[] = { LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 }; |