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-rw-r--r--ports/atmel-samd/Makefile2
-rw-r--r--ports/atmel-samd/boards/itsybitsy_m4_express/mpconfigboard.mk1
-rw-r--r--ports/atmel-samd/boards/pybadge/mpconfigboard.mk1
-rw-r--r--ports/atmel-samd/boards/pyportal/mpconfigboard.mk1
-rw-r--r--ports/cxd56/Makefile1
-rw-r--r--ports/esp32s2/Makefile1
-rw-r--r--ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.mk1
-rw-r--r--ports/litex/Makefile1
-rw-r--r--ports/mimxrt10xx/Makefile1
-rwxr-xr-xports/nrf/Makefile1
-rw-r--r--ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk2
-rwxr-xr-xports/stm/Makefile1
-rw-r--r--ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk2
13 files changed, 11 insertions, 5 deletions
diff --git a/ports/atmel-samd/Makefile b/ports/atmel-samd/Makefile
index 9fa43af21..f92e99333 100644
--- a/ports/atmel-samd/Makefile
+++ b/ports/atmel-samd/Makefile
@@ -106,11 +106,11 @@ CFLAGS += -Os -DNDEBUG
CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_SAMD51 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_CDC_RX_BUFSIZE=256 -DCFG_TUD_MIDI_TX_BUFSIZE=128 -DCFG_TUD_CDC_TX_BUFSIZE=256 -DCFG_TUD_MSC_BUFSIZE=1024
endif
+# option to override compiler optimization level, set in boards/$(BOARD)/mpconfigboard.mk
ifdef OPTIMIZATION_LEVEL
CFLAGS += -O$(OPTIMIZATION_LEVEL)
endif
-
$(echo PERIPHERALS_CHIP_FAMILY=$(PERIPHERALS_CHIP_FAMILY))
#Debugging/Optimization
ifeq ($(DEBUG), 1)
diff --git a/ports/atmel-samd/boards/itsybitsy_m4_express/mpconfigboard.mk b/ports/atmel-samd/boards/itsybitsy_m4_express/mpconfigboard.mk
index d32dcf3d1..7e44d0c72 100644
--- a/ports/atmel-samd/boards/itsybitsy_m4_express/mpconfigboard.mk
+++ b/ports/atmel-samd/boards/itsybitsy_m4_express/mpconfigboard.mk
@@ -15,5 +15,4 @@ LONGINT_IMPL = MPZ
CIRCUITPY_AUDIOBUSIO = 0
CIRCUITPY_BITBANG_APA102 = 1
-
OPTIMIZATION_LEVEL = 2
diff --git a/ports/atmel-samd/boards/pybadge/mpconfigboard.mk b/ports/atmel-samd/boards/pybadge/mpconfigboard.mk
index e898d0dda..d766dbe58 100644
--- a/ports/atmel-samd/boards/pybadge/mpconfigboard.mk
+++ b/ports/atmel-samd/boards/pybadge/mpconfigboard.mk
@@ -16,5 +16,4 @@ CIRCUITPY_GAMEPADSHIFT = 1
CIRCUITPY_STAGE = 1
FROZEN_MPY_DIRS += $(TOP)/frozen/circuitpython-stage/pybadge
-
OPTIMIZATION_LEVEL = 2
diff --git a/ports/atmel-samd/boards/pyportal/mpconfigboard.mk b/ports/atmel-samd/boards/pyportal/mpconfigboard.mk
index 8a197fbf0..66badb741 100644
--- a/ports/atmel-samd/boards/pyportal/mpconfigboard.mk
+++ b/ports/atmel-samd/boards/pyportal/mpconfigboard.mk
@@ -10,5 +10,4 @@ QSPI_FLASH_FILESYSTEM = 1
EXTERNAL_FLASH_DEVICE_COUNT = 2
EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ, GD25Q64C"
LONGINT_IMPL = MPZ
-
OPTIMIZATION_LEVEL = 2
diff --git a/ports/cxd56/Makefile b/ports/cxd56/Makefile
index 6838270a6..8a23059b7 100644
--- a/ports/cxd56/Makefile
+++ b/ports/cxd56/Makefile
@@ -123,6 +123,7 @@ CFLAGS += \
-fdata-sections \
-Wall \
+# option to override compiler optimization level, set in boards/$(BOARD)/mpconfigboard.mk
ifdef OPTIMIZATION_LEVEL
CFLAGS += -O$(OPTIMIZATION_LEVEL)
endif
diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile
index ec6a8fc0c..f094150d7 100644
--- a/ports/esp32s2/Makefile
+++ b/ports/esp32s2/Makefile
@@ -109,6 +109,7 @@ else
### CFLAGS += -flto
endif
+# option to override compiler optimization level, set in boards/$(BOARD)/mpconfigboard.mk
ifdef OPTIMIZATION_LEVEL
CFLAGS += -O$(OPTIMIZATION_LEVEL)
endif
diff --git a/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.mk b/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.mk
index 0ccfe06ed..70caacf87 100644
--- a/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.mk
+++ b/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.mk
@@ -17,5 +17,4 @@ CIRCUITPY_ESP_FLASH_FREQ=40m
CIRCUITPY_ESP_FLASH_SIZE=4MB
CIRCUITPY_MODULE=wroom
-
OPTIMIZATION_LEVEL = 2
diff --git a/ports/litex/Makefile b/ports/litex/Makefile
index 7ddf3c061..6f083e5d4 100644
--- a/ports/litex/Makefile
+++ b/ports/litex/Makefile
@@ -83,6 +83,7 @@ else
### CFLAGS += -flto
endif
+# option to override compiler optimization level, set in boards/$(BOARD)/mpconfigboard.mk
ifdef OPTIMIZATION_LEVEL
CFLAGS += -O$(OPTIMIZATION_LEVEL)
endif
diff --git a/ports/mimxrt10xx/Makefile b/ports/mimxrt10xx/Makefile
index 2201d92a3..bfc73d638 100644
--- a/ports/mimxrt10xx/Makefile
+++ b/ports/mimxrt10xx/Makefile
@@ -108,6 +108,7 @@ CFLAGS += \
-Os -g3 -Wno-unused-parameter \
-ffunction-sections -fdata-sections -fstack-usage
+# option to override compiler optimization level, set in boards/$(BOARD)/mpconfigboard.mk
ifdef OPTIMIZATION_LEVEL
CFLAGS += -O$(OPTIMIZATION_LEVEL)
endif
diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile
index 28fd44b85..d3c311e3f 100755
--- a/ports/nrf/Makefile
+++ b/ports/nrf/Makefile
@@ -92,6 +92,7 @@ else
CFLAGS += -flto -flto-partition=none
endif
+# option to override compiler optimization level, set in boards/$(BOARD)/mpconfigboard.mk
ifdef OPTIMIZATION_LEVEL
CFLAGS += -O$(OPTIMIZATION_LEVEL)
endif
diff --git a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk
index 38c993334..db0259423 100644
--- a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk
+++ b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk
@@ -14,3 +14,5 @@ EXTERNAL_FLASH_DEVICES = "GD25Q16C"
# We use a CFLAGS define here because there are include order issues
# if we try to include "mpconfigport.h" into nrfx_config.h .
CFLAGS += -DCIRCUITPY_NRF_NUM_I2C=2
+
+OPTIMIZATION_LEVEL = 2
diff --git a/ports/stm/Makefile b/ports/stm/Makefile
index 8753bd8f8..411d8146c 100755
--- a/ports/stm/Makefile
+++ b/ports/stm/Makefile
@@ -91,6 +91,7 @@ else
# CFLAGS += -flto
endif
+# option to override compiler optimization level, set in boards/$(BOARD)/mpconfigboard.mk
ifdef OPTIMIZATION_LEVEL
CFLAGS += -O$(OPTIMIZATION_LEVEL)
endif
diff --git a/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk
index 2b2c0d6db..e7b54af5c 100644
--- a/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk
+++ b/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk
@@ -15,3 +15,5 @@ LD_COMMON = boards/common_default.ld
LD_DEFAULT = boards/STM32F405_default.ld
LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option
UF2_OFFSET = 0x8010000
+
+OPTIMIZATION_LEVEL = 2