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Diffstat (limited to 'ports/atmel-samd/asf4_conf/same51/hpl_sdhc_config.h')
-rw-r--r--ports/atmel-samd/asf4_conf/same51/hpl_sdhc_config.h24
1 files changed, 24 insertions, 0 deletions
diff --git a/ports/atmel-samd/asf4_conf/same51/hpl_sdhc_config.h b/ports/atmel-samd/asf4_conf/same51/hpl_sdhc_config.h
new file mode 100644
index 000000000..daa662051
--- /dev/null
+++ b/ports/atmel-samd/asf4_conf/same51/hpl_sdhc_config.h
@@ -0,0 +1,24 @@
+/* Auto-generated config file hpl_sdhc_config.h */
+#ifndef HPL_SDHC_CONFIG_H
+#define HPL_SDHC_CONFIG_H
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+#include "peripheral_clk_config.h"
+
+#ifndef CONF_BASE_FREQUENCY
+#define CONF_BASE_FREQUENCY CONF_SDHC0_FREQUENCY
+#endif
+
+// <o> Clock Generator Select
+// <0=> Divided Clock mode
+// <1=> Programmable Clock mode
+// <i> This defines the clock generator mode in the SDCLK Frequency Select field
+// <id> sdhc_clk_gsel
+#ifndef CONF_SDHC0_CLK_GEN_SEL
+#define CONF_SDHC0_CLK_GEN_SEL 0
+#endif
+
+// <<< end of configuration section >>>
+
+#endif // HPL_SDHC_CONFIG_H