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-rw-r--r--ports/nrf/common-hal/busio/I2C.c72
-rw-r--r--ports/nrf/common-hal/busio/I2C.h2
-rw-r--r--ports/nrf/common-hal/busio/SPI.c113
-rw-r--r--ports/nrf/common-hal/busio/SPI.h2
-rw-r--r--ports/nrf/common-hal/busio/UART.c100
5 files changed, 145 insertions, 144 deletions
diff --git a/ports/nrf/common-hal/busio/I2C.c b/ports/nrf/common-hal/busio/I2C.c
index 654fa857f..de9417a6c 100644
--- a/ports/nrf/common-hal/busio/I2C.c
+++ b/ports/nrf/common-hal/busio/I2C.c
@@ -42,24 +42,22 @@
#define I2C_MAX_XFER_LEN ((1UL << TWIM0_EASYDMA_MAXCNT_SIZE) - 1)
STATIC twim_peripheral_t twim_peripherals[] = {
-#if NRFX_CHECK(NRFX_TWIM0_ENABLED)
+ #if NRFX_CHECK(NRFX_TWIM0_ENABLED)
// SPIM0 and TWIM0 share an address.
{ .twim = NRFX_TWIM_INSTANCE(0),
- .in_use = false
- },
-#endif
-#if NRFX_CHECK(NRFX_TWIM1_ENABLED)
+ .in_use = false},
+ #endif
+ #if NRFX_CHECK(NRFX_TWIM1_ENABLED)
// SPIM1 and TWIM1 share an address.
{ .twim = NRFX_TWIM_INSTANCE(1),
- .in_use = false
- },
-#endif
+ .in_use = false},
+ #endif
};
STATIC bool never_reset[MP_ARRAY_SIZE(twim_peripherals)];
void i2c_reset(void) {
- for (size_t i = 0 ; i < MP_ARRAY_SIZE(twim_peripherals); i++) {
+ for (size_t i = 0; i < MP_ARRAY_SIZE(twim_peripherals); i++) {
if (never_reset[i]) {
continue;
}
@@ -69,7 +67,7 @@ void i2c_reset(void) {
}
void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) {
- for (size_t i = 0 ; i < MP_ARRAY_SIZE(twim_peripherals); i++) {
+ for (size_t i = 0; i < MP_ARRAY_SIZE(twim_peripherals); i++) {
if (self->twim_peripheral == &twim_peripherals[i]) {
never_reset[i] = true;
@@ -82,15 +80,15 @@ void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) {
static uint8_t twi_error_to_mp(const nrfx_err_t err) {
switch (err) {
- case NRFX_ERROR_DRV_TWI_ERR_ANACK:
- return MP_ENODEV;
- case NRFX_ERROR_BUSY:
- return MP_EBUSY;
- case NRFX_ERROR_DRV_TWI_ERR_DNACK:
- case NRFX_ERROR_INVALID_ADDR:
- return MP_EIO;
- default:
- break;
+ case NRFX_ERROR_DRV_TWI_ERR_ANACK:
+ return MP_ENODEV;
+ case NRFX_ERROR_BUSY:
+ return MP_EBUSY;
+ case NRFX_ERROR_DRV_TWI_ERR_DNACK:
+ case NRFX_ERROR_INVALID_ADDR:
+ return MP_EIO;
+ default:
+ break;
}
return 0;
@@ -103,7 +101,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t *
// Find a free instance.
self->twim_peripheral = NULL;
- for (size_t i = 0 ; i < MP_ARRAY_SIZE(twim_peripherals); i++) {
+ for (size_t i = 0; i < MP_ARRAY_SIZE(twim_peripherals); i++) {
if (!twim_peripherals[i].in_use) {
self->twim_peripheral = &twim_peripherals[i];
// Mark it as in_use later after other validation is finished.
@@ -115,7 +113,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t *
mp_raise_ValueError(translate("All I2C peripherals are in use"));
}
-#if CIRCUITPY_REQUIRE_I2C_PULLUPS
+ #if CIRCUITPY_REQUIRE_I2C_PULLUPS
// Test that the pins are in a high state. (Hopefully indicating they are pulled up.)
nrf_gpio_cfg_input(scl->number, NRF_GPIO_PIN_PULLDOWN);
nrf_gpio_cfg_input(sda->number, NRF_GPIO_PIN_PULLDOWN);
@@ -133,19 +131,19 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t *
reset_pin_number(scl->number);
mp_raise_RuntimeError(translate("No pull up found on SDA or SCL; check your wiring"));
}
-#endif
+ #endif
nrfx_twim_config_t config = NRFX_TWIM_DEFAULT_CONFIG(scl->number, sda->number);
-#if defined(TWIM_FREQUENCY_FREQUENCY_K1000)
+ #if defined(TWIM_FREQUENCY_FREQUENCY_K1000)
if (frequency >= 1000000) {
config.frequency = NRF_TWIM_FREQ_1000K;
} else
-#endif
+ #endif
if (frequency >= 400000) {
- config.frequency = NRF_TWIM_FREQ_400K;
+ config.frequency = NRF_TWIM_FREQ_400K;
} else if (frequency >= 250000) {
- config.frequency = NRF_TWIM_FREQ_250K;
+ config.frequency = NRF_TWIM_FREQ_250K;
} else {
config.frequency = NRF_TWIM_FREQ_100K;
}
@@ -198,11 +196,15 @@ bool common_hal_busio_i2c_probe(busio_i2c_obj_t *self, uint8_t addr) {
nrf_twim_task_trigger(reg, NRF_TWIM_TASK_STARTTX);
while (nrf_twim_event_check(reg, NRF_TWIM_EVENT_TXSTARTED) == 0 &&
- nrf_twim_event_check(reg, NRF_TWIM_EVENT_ERROR) == 0);
+ nrf_twim_event_check(reg, NRF_TWIM_EVENT_ERROR) == 0) {
+ ;
+ }
nrf_twim_event_clear(reg, NRF_TWIM_EVENT_TXSTARTED);
nrf_twim_task_trigger(reg, NRF_TWIM_TASK_STOP);
- while (nrf_twim_event_check(reg, NRF_TWIM_EVENT_STOPPED) == 0);
+ while (nrf_twim_event_check(reg, NRF_TWIM_EVENT_STOPPED) == 0) {
+ ;
+ }
nrf_twim_event_clear(reg, NRF_TWIM_EVENT_STOPPED);
if (nrf_twim_event_check(reg, NRF_TWIM_EVENT_ERROR)) {
@@ -237,7 +239,7 @@ void common_hal_busio_i2c_unlock(busio_i2c_obj_t *self) {
}
uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr, const uint8_t *data, size_t len, bool stopBit) {
- if(len == 0) {
+ if (len == 0) {
return common_hal_busio_i2c_probe(self, addr) ? 0 : MP_ENODEV;
}
@@ -246,12 +248,12 @@ uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr, const u
nrfx_twim_enable(&self->twim_peripheral->twim);
// break into MAX_XFER_LEN transaction
- while ( len ) {
+ while (len) {
const size_t xact_len = MIN(len, I2C_MAX_XFER_LEN);
- nrfx_twim_xfer_desc_t xfer_desc = NRFX_TWIM_XFER_DESC_TX(addr, (uint8_t*) data, xact_len);
+ nrfx_twim_xfer_desc_t xfer_desc = NRFX_TWIM_XFER_DESC_TX(addr, (uint8_t *)data, xact_len);
uint32_t const flags = (stopBit ? 0 : NRFX_TWIM_FLAG_TX_NO_STOP);
- if ( NRFX_SUCCESS != (err = nrfx_twim_xfer(&self->twim_peripheral->twim, &xfer_desc, flags)) ) {
+ if (NRFX_SUCCESS != (err = nrfx_twim_xfer(&self->twim_peripheral->twim, &xfer_desc, flags))) {
break;
}
@@ -265,7 +267,7 @@ uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr, const u
}
uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr, uint8_t *data, size_t len) {
- if(len == 0) {
+ if (len == 0) {
return 0;
}
@@ -274,11 +276,11 @@ uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr, uint8_t
nrfx_twim_enable(&self->twim_peripheral->twim);
// break into MAX_XFER_LEN transaction
- while ( len ) {
+ while (len) {
const size_t xact_len = MIN(len, I2C_MAX_XFER_LEN);
nrfx_twim_xfer_desc_t xfer_desc = NRFX_TWIM_XFER_DESC_RX(addr, data, xact_len);
- if ( NRFX_SUCCESS != (err = nrfx_twim_xfer(&self->twim_peripheral->twim, &xfer_desc, 0)) ) {
+ if (NRFX_SUCCESS != (err = nrfx_twim_xfer(&self->twim_peripheral->twim, &xfer_desc, 0))) {
break;
}
diff --git a/ports/nrf/common-hal/busio/I2C.h b/ports/nrf/common-hal/busio/I2C.h
index b75d15f00..04bc57868 100644
--- a/ports/nrf/common-hal/busio/I2C.h
+++ b/ports/nrf/common-hal/busio/I2C.h
@@ -38,7 +38,7 @@ typedef struct {
typedef struct {
mp_obj_base_t base;
- twim_peripheral_t* twim_peripheral;
+ twim_peripheral_t *twim_peripheral;
bool has_lock;
uint8_t scl_pin_number;
uint8_t sda_pin_number;
diff --git a/ports/nrf/common-hal/busio/SPI.c b/ports/nrf/common-hal/busio/SPI.c
index 1cf074955..309e1bce1 100644
--- a/ports/nrf/common-hal/busio/SPI.c
+++ b/ports/nrf/common-hal/busio/SPI.c
@@ -52,45 +52,41 @@
// These are in order from highest available frequency to lowest (32MHz first, then 8MHz).
STATIC spim_peripheral_t spim_peripherals[] = {
-#if NRFX_CHECK(NRFX_SPIM3_ENABLED)
+ #if NRFX_CHECK(NRFX_SPIM3_ENABLED)
// SPIM3 exists only on nRF52840 and supports 32MHz max. All other SPIM's are only 8MHz max.
// Allocate SPIM3 first.
{ .spim = NRFX_SPIM_INSTANCE(3),
.max_frequency = 32000000,
- .max_xfer_size = MIN(SPIM3_BUFFER_RAM_SIZE, (1UL << SPIM3_EASYDMA_MAXCNT_SIZE) - 1)
- },
-#endif
-#if NRFX_CHECK(NRFX_SPIM2_ENABLED)
+ .max_xfer_size = MIN(SPIM3_BUFFER_RAM_SIZE, (1UL << SPIM3_EASYDMA_MAXCNT_SIZE) - 1)},
+ #endif
+ #if NRFX_CHECK(NRFX_SPIM2_ENABLED)
// SPIM2 is not shared with a TWIM, so allocate before the shared ones.
{ .spim = NRFX_SPIM_INSTANCE(2),
.max_frequency = 8000000,
- .max_xfer_size = (1UL << SPIM2_EASYDMA_MAXCNT_SIZE) - 1
- },
-#endif
-#if NRFX_CHECK(NRFX_SPIM1_ENABLED)
+ .max_xfer_size = (1UL << SPIM2_EASYDMA_MAXCNT_SIZE) - 1},
+ #endif
+ #if NRFX_CHECK(NRFX_SPIM1_ENABLED)
// SPIM1 and TWIM1 share an address.
{ .spim = NRFX_SPIM_INSTANCE(1),
.max_frequency = 8000000,
- .max_xfer_size = (1UL << SPIM1_EASYDMA_MAXCNT_SIZE) - 1
- },
-#endif
-#if NRFX_CHECK(NRFX_SPIM0_ENABLED)
+ .max_xfer_size = (1UL << SPIM1_EASYDMA_MAXCNT_SIZE) - 1},
+ #endif
+ #if NRFX_CHECK(NRFX_SPIM0_ENABLED)
// SPIM0 and TWIM0 share an address.
{ .spim = NRFX_SPIM_INSTANCE(0),
.max_frequency = 8000000,
- .max_xfer_size = (1UL << SPIM0_EASYDMA_MAXCNT_SIZE) - 1
- },
-#endif
+ .max_xfer_size = (1UL << SPIM0_EASYDMA_MAXCNT_SIZE) - 1},
+ #endif
};
STATIC bool never_reset[MP_ARRAY_SIZE(spim_peripherals)];
// Separate RAM area for SPIM3 transmit buffer to avoid SPIM3 hardware errata.
// https://infocenter.nordicsemi.com/index.jsp?topic=%2Ferrata_nRF52840_Rev2%2FERR%2FnRF52840%2FRev2%2Flatest%2Fanomaly_840_198.html
-STATIC uint8_t *spim3_transmit_buffer = (uint8_t *) SPIM3_BUFFER_RAM_START_ADDR;
+STATIC uint8_t *spim3_transmit_buffer = (uint8_t *)SPIM3_BUFFER_RAM_START_ADDR;
void spi_reset(void) {
- for (size_t i = 0 ; i < MP_ARRAY_SIZE(spim_peripherals); i++) {
+ for (size_t i = 0; i < MP_ARRAY_SIZE(spim_peripherals); i++) {
if (never_reset[i]) {
continue;
}
@@ -99,7 +95,7 @@ void spi_reset(void) {
}
void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) {
- for (size_t i = 0 ; i < MP_ARRAY_SIZE(spim_peripherals); i++) {
+ for (size_t i = 0; i < MP_ARRAY_SIZE(spim_peripherals); i++) {
if (self->spim_peripheral == &spim_peripherals[i]) {
never_reset[i] = true;
@@ -119,12 +115,12 @@ static nrf_spim_frequency_t baudrate_to_spim_frequency(const uint32_t baudrate)
const uint32_t boundary;
nrf_spim_frequency_t spim_frequency;
} baudrate_map[] = {
-#ifdef SPIM_FREQUENCY_FREQUENCY_M32
+ #ifdef SPIM_FREQUENCY_FREQUENCY_M32
{ 32000000, NRF_SPIM_FREQ_32M },
-#endif
-#ifdef SPIM_FREQUENCY_FREQUENCY_M16
+ #endif
+ #ifdef SPIM_FREQUENCY_FREQUENCY_M16
{ 16000000, NRF_SPIM_FREQ_16M },
-#endif
+ #endif
{ 8000000, NRF_SPIM_FREQ_8M },
{ 4000000, NRF_SPIM_FREQ_4M },
{ 2000000, NRF_SPIM_FREQ_2M },
@@ -147,10 +143,10 @@ static nrf_spim_frequency_t baudrate_to_spim_frequency(const uint32_t baudrate)
return 0;
}
-void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi, const mcu_pin_obj_t * miso) {
+void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t *clock, const mcu_pin_obj_t *mosi, const mcu_pin_obj_t *miso) {
// Find a free instance, with most desirable (highest freq and not shared) allocated first.
self->spim_peripheral = NULL;
- for (size_t i = 0 ; i < MP_ARRAY_SIZE(spim_peripherals); i++) {
+ for (size_t i = 0; i < MP_ARRAY_SIZE(spim_peripherals); i++) {
if ((spim_peripherals[i].spim.p_reg->ENABLE & SPIM_ENABLE_ENABLE_Msk) == 0) {
self->spim_peripheral = &spim_peripherals[i];
break;
@@ -162,7 +158,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t *
}
nrfx_spim_config_t config = NRFX_SPIM_DEFAULT_CONFIG(NRFX_SPIM_PIN_NOT_USED, NRFX_SPIM_PIN_NOT_USED,
- NRFX_SPIM_PIN_NOT_USED, NRFX_SPIM_PIN_NOT_USED);
+ NRFX_SPIM_PIN_NOT_USED, NRFX_SPIM_PIN_NOT_USED);
config.frequency = baudrate_to_spim_frequency(self->spim_peripheral->max_frequency);
@@ -198,8 +194,9 @@ bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) {
}
void common_hal_busio_spi_deinit(busio_spi_obj_t *self) {
- if (common_hal_busio_spi_deinited(self))
+ if (common_hal_busio_spi_deinited(self)) {
return;
+ }
nrfx_spim_uninit(&self->spim_peripheral->spim);
@@ -211,12 +208,12 @@ void common_hal_busio_spi_deinit(busio_spi_obj_t *self) {
bool common_hal_busio_spi_configure(busio_spi_obj_t *self, uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) {
// nrf52 does not support 16 bit
if (bits != 8) {
- return false;
+ return false;
}
// Set desired frequency, rounding down, and don't go above available frequency for this SPIM.
nrf_spim_frequency_set(self->spim_peripheral->spim.p_reg,
- baudrate_to_spim_frequency(MIN(baudrate, self->spim_peripheral->max_frequency)));
+ baudrate_to_spim_frequency(MIN(baudrate, self->spim_peripheral->max_frequency)));
nrf_spim_mode_t mode = NRF_SPIM_MODE_0;
if (polarity) {
@@ -251,7 +248,7 @@ void common_hal_busio_spi_unlock(busio_spi_obj_t *self) {
bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *data, size_t len) {
const bool is_spim3 = self->spim_peripheral->spim.p_reg == NRF_SPIM3;
- uint8_t *next_chunk = (uint8_t *) data;
+ uint8_t *next_chunk = (uint8_t *)data;
while (len > 0) {
size_t chunk_size = MIN(len, self->spim_peripheral->max_xfer_size);
@@ -301,7 +298,7 @@ bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_ou
}
const nrfx_spim_xfer_desc_t xfer =
NRFX_SPIM_SINGLE_XFER(next_chunk_out, chunk_size,
- next_chunk_in, chunk_size);
+ next_chunk_in, chunk_size);
if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS) {
return false;
}
@@ -313,39 +310,39 @@ bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_ou
return true;
}
-uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) {
+uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t *self) {
switch (self->spim_peripheral->spim.p_reg->FREQUENCY) {
- case NRF_SPIM_FREQ_125K:
- return 125000;
- case NRF_SPIM_FREQ_250K:
- return 250000;
- case NRF_SPIM_FREQ_500K:
- return 500000;
- case NRF_SPIM_FREQ_1M:
- return 1000000;
- case NRF_SPIM_FREQ_2M:
- return 2000000;
- case NRF_SPIM_FREQ_4M:
- return 4000000;
- case NRF_SPIM_FREQ_8M:
- return 8000000;
-#ifdef SPIM_FREQUENCY_FREQUENCY_M16
- case NRF_SPIM_FREQ_16M:
- return 16000000;
-#endif
-#ifdef SPIM_FREQUENCY_FREQUENCY_M32
- case NRF_SPIM_FREQ_32M:
- return 32000000;
-#endif
- default:
- return 0;
+ case NRF_SPIM_FREQ_125K:
+ return 125000;
+ case NRF_SPIM_FREQ_250K:
+ return 250000;
+ case NRF_SPIM_FREQ_500K:
+ return 500000;
+ case NRF_SPIM_FREQ_1M:
+ return 1000000;
+ case NRF_SPIM_FREQ_2M:
+ return 2000000;
+ case NRF_SPIM_FREQ_4M:
+ return 4000000;
+ case NRF_SPIM_FREQ_8M:
+ return 8000000;
+ #ifdef SPIM_FREQUENCY_FREQUENCY_M16
+ case NRF_SPIM_FREQ_16M:
+ return 16000000;
+ #endif
+ #ifdef SPIM_FREQUENCY_FREQUENCY_M32
+ case NRF_SPIM_FREQ_32M:
+ return 32000000;
+ #endif
+ default:
+ return 0;
}
}
-uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self) {
+uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t *self) {
return (self->spim_peripheral->spim.p_reg->CONFIG & SPIM_CONFIG_CPHA_Msk) >> SPIM_CONFIG_CPHA_Pos;
}
-uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self) {
+uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t *self) {
return (self->spim_peripheral->spim.p_reg->CONFIG & SPIM_CONFIG_CPOL_Msk) >> SPIM_CONFIG_CPOL_Pos;
}
diff --git a/ports/nrf/common-hal/busio/SPI.h b/ports/nrf/common-hal/busio/SPI.h
index ef3ac9531..796ff59f9 100644
--- a/ports/nrf/common-hal/busio/SPI.h
+++ b/ports/nrf/common-hal/busio/SPI.h
@@ -38,7 +38,7 @@ typedef struct {
typedef struct {
mp_obj_base_t base;
- spim_peripheral_t* spim_peripheral;
+ spim_peripheral_t *spim_peripheral;
bool has_lock;
uint8_t clock_pin_number;
uint8_t MOSI_pin_number;
diff --git a/ports/nrf/common-hal/busio/UART.c b/ports/nrf/common-hal/busio/UART.c
index 491e360e4..6436cb4e7 100644
--- a/ports/nrf/common-hal/busio/UART.c
+++ b/ports/nrf/common-hal/busio/UART.c
@@ -41,23 +41,23 @@
// expression to examine, and return value in case of failing
#define _VERIFY_ERR(_exp) \
- do {\
- uint32_t _err = (_exp);\
- if (NRFX_SUCCESS != _err ) {\
- mp_raise_msg_varg(&mp_type_RuntimeError, translate("error = 0x%08lX"), _err);\
- }\
- }while(0)
+ do { \
+ uint32_t _err = (_exp); \
+ if (NRFX_SUCCESS != _err) { \
+ mp_raise_msg_varg(&mp_type_RuntimeError, translate("error = 0x%08lX"), _err); \
+ } \
+ } while (0)
static nrfx_uarte_t nrfx_uartes[] = {
-#if NRFX_CHECK(NRFX_UARTE0_ENABLED)
+ #if NRFX_CHECK(NRFX_UARTE0_ENABLED)
NRFX_UARTE_INSTANCE(0),
-#endif
-#if NRFX_CHECK(NRFX_UARTE1_ENABLED)
+ #endif
+ #if NRFX_CHECK(NRFX_UARTE1_ENABLED)
NRFX_UARTE_INSTANCE(1),
-#endif
+ #endif
};
-static uint32_t get_nrf_baud (uint32_t baudrate) {
+static uint32_t get_nrf_baud(uint32_t baudrate) {
static const struct {
const uint32_t boundary;
@@ -70,9 +70,9 @@ static uint32_t get_nrf_baud (uint32_t baudrate) {
{ 14400, NRF_UARTE_BAUDRATE_14400 },
{ 19200, NRF_UARTE_BAUDRATE_19200 },
{ 28800, NRF_UARTE_BAUDRATE_28800 },
- { 31250, NRF_UARTE_BAUDRATE_31250 },
+ { 31250, NRF_UARTE_BAUDRATE_31250 },
{ 38400, NRF_UARTE_BAUDRATE_38400 },
- { 56000, NRF_UARTE_BAUDRATE_56000 },
+ { 56000, NRF_UARTE_BAUDRATE_56000 },
{ 57600, NRF_UARTE_BAUDRATE_57600 },
{ 76800, NRF_UARTE_BAUDRATE_76800 },
{ 115200, NRF_UARTE_BAUDRATE_115200 },
@@ -94,26 +94,26 @@ static uint32_t get_nrf_baud (uint32_t baudrate) {
} while (true);
}
-static void uart_callback_irq (const nrfx_uarte_event_t * event, void * context) {
- busio_uart_obj_t* self = (busio_uart_obj_t*) context;
+static void uart_callback_irq(const nrfx_uarte_event_t *event, void *context) {
+ busio_uart_obj_t *self = (busio_uart_obj_t *)context;
- switch ( event->type ) {
+ switch (event->type) {
case NRFX_UARTE_EVT_RX_DONE:
if (ringbuf_num_empty(&self->ringbuf) >= event->data.rxtx.bytes) {
ringbuf_put_n(&self->ringbuf, event->data.rxtx.p_data, event->data.rxtx.bytes);
// keep receiving
- (void) nrfx_uarte_rx(self->uarte, &self->rx_char, 1);
+ (void)nrfx_uarte_rx(self->uarte, &self->rx_char, 1);
} else {
// receive buffer full, suspend
self->rx_paused = true;
nrf_gpio_pin_write(self->rts_pin_number, true);
}
- break;
+ break;
case NRFX_UARTE_EVT_TX_DONE:
// nothing to do
- break;
+ break;
case NRFX_UARTE_EVT_ERROR:
// Possible Error source is Overrun, Parity, Framing, Break
@@ -122,26 +122,26 @@ static void uart_callback_irq (const nrfx_uarte_event_t * event, void * context)
ringbuf_put_n(&self->ringbuf, event->data.error.rxtx.p_data, event->data.error.rxtx.bytes);
// Keep receiving
- (void) nrfx_uarte_rx(self->uarte, &self->rx_char, 1);
- break;
+ (void)nrfx_uarte_rx(self->uarte, &self->rx_char, 1);
+ break;
default:
- break;
+ break;
}
}
void uart_reset(void) {
- for (size_t i = 0 ; i < MP_ARRAY_SIZE(nrfx_uartes); i++) {
+ for (size_t i = 0; i < MP_ARRAY_SIZE(nrfx_uartes); i++) {
nrfx_uarte_uninit(&nrfx_uartes[i]);
}
}
void common_hal_busio_uart_construct(busio_uart_obj_t *self,
- const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx,
- const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts,
- const mcu_pin_obj_t * rs485_dir, bool rs485_invert,
+ const mcu_pin_obj_t *tx, const mcu_pin_obj_t *rx,
+ const mcu_pin_obj_t *rts, const mcu_pin_obj_t *cts,
+ const mcu_pin_obj_t *rs485_dir, bool rs485_invert,
uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop,
- mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer,
+ mp_float_t timeout, uint16_t receiver_buffer_size, byte *receiver_buffer,
bool sigint_enabled) {
if (bits != 8) {
@@ -154,7 +154,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
// Find a free UART peripheral.
self->uarte = NULL;
- for (size_t i = 0 ; i < MP_ARRAY_SIZE(nrfx_uartes); i++) {
+ for (size_t i = 0; i < MP_ARRAY_SIZE(nrfx_uartes); i++) {
if ((nrfx_uartes[i].p_reg->ENABLE & UARTE_ENABLE_ENABLE_Msk) == 0) {
self->uarte = &nrfx_uartes[i];
break;
@@ -165,15 +165,15 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
mp_raise_ValueError(translate("All UART peripherals are in use"));
}
- if ( (tx == NULL) && (rx == NULL) ) {
+ if ((tx == NULL) && (rx == NULL)) {
mp_raise_ValueError(translate("tx and rx cannot both be None"));
}
- if ( receiver_buffer_size == 0 ) {
+ if (receiver_buffer_size == 0) {
mp_raise_ValueError(translate("Invalid buffer size"));
}
- if ( parity == BUSIO_UART_PARITY_ODD ) {
+ if (parity == BUSIO_UART_PARITY_ODD) {
mp_raise_ValueError(translate("Odd parity is not supported"));
}
@@ -196,7 +196,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
_VERIFY_ERR(nrfx_uarte_init(self->uarte, &config, uart_callback_irq));
// Init buffer for rx
- if ( rx != NULL ) {
+ if (rx != NULL) {
// Initially allocate the UART's buffer in the long-lived part of the
// heap. UARTs are generally long-lived objects, but the "make long-
// lived" machinery is incapable of moving internal pointers like
@@ -213,21 +213,21 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
claim_pin(rx);
}
- if ( tx != NULL ) {
+ if (tx != NULL) {
self->tx_pin_number = tx->number;
claim_pin(tx);
} else {
self->tx_pin_number = NO_PIN;
}
- if ( rts != NULL ) {
+ if (rts != NULL) {
self->rts_pin_number = rts->number;
claim_pin(rts);
} else {
self->rts_pin_number = NO_PIN;
}
- if ( cts != NULL ) {
+ if (cts != NULL) {
self->cts_pin_number = cts->number;
claim_pin(cts);
} else {
@@ -248,7 +248,7 @@ bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) {
}
void common_hal_busio_uart_deinit(busio_uart_obj_t *self) {
- if ( !common_hal_busio_uart_deinited(self) ) {
+ if (!common_hal_busio_uart_deinited(self)) {
nrfx_uarte_uninit(self->uarte);
reset_pin_number(self->tx_pin_number);
reset_pin_number(self->rx_pin_number);
@@ -264,7 +264,7 @@ void common_hal_busio_uart_deinit(busio_uart_obj_t *self) {
// Read characters.
size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) {
- if ( nrf_uarte_rx_pin_get(self->uarte->p_reg) == NRF_UARTE_PSEL_DISCONNECTED ) {
+ if (nrf_uarte_rx_pin_get(self->uarte->p_reg) == NRF_UARTE_PSEL_DISCONNECTED) {
mp_raise_ValueError(translate("No RX pin"));
}
@@ -278,10 +278,10 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t
*/
// Wait for all bytes received or timeout
- while ( (ringbuf_num_filled(&self->ringbuf) < len) && (supervisor_ticks_ms64() - start_ticks < self->timeout_ms) ) {
+ while ((ringbuf_num_filled(&self->ringbuf) < len) && (supervisor_ticks_ms64() - start_ticks < self->timeout_ms)) {
RUN_BACKGROUND_TASKS;
// Allow user to break out of a timeout with a KeyboardInterrupt.
- if ( mp_hal_is_interrupted() ) {
+ if (mp_hal_is_interrupted()) {
return 0;
}
}
@@ -297,7 +297,7 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t
// the character that did not fit in ringbuf is in rx_char
ringbuf_put_n(&self->ringbuf, &self->rx_char, 1);
// keep receiving
- (void) nrfx_uarte_rx(self->uarte, &self->rx_char, 1);
+ (void)nrfx_uarte_rx(self->uarte, &self->rx_char, 1);
nrf_gpio_pin_write(self->rts_pin_number, false);
self->rx_paused = false;
}
@@ -308,18 +308,20 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t
}
// Write characters.
-size_t common_hal_busio_uart_write (busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) {
- if ( nrf_uarte_tx_pin_get(self->uarte->p_reg) == NRF_UARTE_PSEL_DISCONNECTED ) {
+size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) {
+ if (nrf_uarte_tx_pin_get(self->uarte->p_reg) == NRF_UARTE_PSEL_DISCONNECTED) {
mp_raise_ValueError(translate("No TX pin"));
}
- if ( len == 0 ) return 0;
+ if (len == 0) {
+ return 0;
+ }
// EasyDMA can only access SRAM
- uint8_t * tx_buf = (uint8_t*) data;
- if ( !nrfx_is_in_ram(data) ) {
+ uint8_t *tx_buf = (uint8_t *)data;
+ if (!nrfx_is_in_ram(data)) {
// TODO: If this is not too big, we could allocate it on the stack.
- tx_buf = (uint8_t *) gc_alloc(len, false, false);
+ tx_buf = (uint8_t *)gc_alloc(len, false, false);
memcpy(tx_buf, data, len);
}
@@ -328,11 +330,11 @@ size_t common_hal_busio_uart_write (busio_uart_obj_t *self, const uint8_t *data,
(*errcode) = 0;
// Wait for write to complete.
- while ( nrfx_uarte_tx_in_progress(self->uarte) ) {
+ while (nrfx_uarte_tx_in_progress(self->uarte)) {
RUN_BACKGROUND_TASKS;
}
- if ( !nrfx_is_in_ram(data) ) {
+ if (!nrfx_is_in_ram(data)) {
gc_free(tx_buf);
}
@@ -349,7 +351,7 @@ void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrat
}
mp_float_t common_hal_busio_uart_get_timeout(busio_uart_obj_t *self) {
- return (mp_float_t) (self->timeout_ms / 1000.0f);
+ return (mp_float_t)(self->timeout_ms / 1000.0f);
}
void common_hal_busio_uart_set_timeout(busio_uart_obj_t *self, mp_float_t timeout) {
generated by cgit v1.2.3 (git 2.39.1) at 2026-08-08 10:00:24 +0000