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-rw-r--r--ports/esp32s2/common-hal/displayio/ParallelBus.c90
1 files changed, 39 insertions, 51 deletions
diff --git a/ports/esp32s2/common-hal/displayio/ParallelBus.c b/ports/esp32s2/common-hal/displayio/ParallelBus.c
index 04e24b291..b644610f2 100644
--- a/ports/esp32s2/common-hal/displayio/ParallelBus.c
+++ b/ports/esp32s2/common-hal/displayio/ParallelBus.c
@@ -34,20 +34,18 @@
#include "shared-bindings/microcontroller/__init__.h"
/*
-* Current pin limitations:
-* data0 pin must be byte aligned and use pin numbers < 32 (data0 options: 0, 8, 16 or 24)
-* write pin must be pin number < 32.
-*
-* Future extensions:
-* 1. Allow data0 pin numbers >= 32.
-* 2. Allow write pin numbers >= 32.
-*/
+ *
+ * Current pin limitations for ESP32-S2 ParallelBus:
+ * 1. data0 pin must be byte aligned (data0 pin options: 0, 8, 16 or 24)
+ * 2. The 8 data lines must use pin numbers < 32
+ * 3. The write pin must be pin number < 32.
+ *
+ */
void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* self,
const mcu_pin_obj_t* data0, const mcu_pin_obj_t* command, const mcu_pin_obj_t* chip_select,
const mcu_pin_obj_t* write, const mcu_pin_obj_t* read, const mcu_pin_obj_t* reset) {
-
uint8_t data_pin = data0->number;
if ( (data_pin % 8 != 0) && (data_pin >= 32) ) {
mp_raise_ValueError(translate("Data 0 pin must be byte aligned and < 32"));
@@ -63,10 +61,10 @@ void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* sel
mp_raise_ValueError(translate("Write pin must be < 32"));
}
- gpio_dev_t *g = &GPIO; /* this is the GPIO registers, see "extern gpio_dev_t GPIO" from file:gpio_struct.h */
+ gpio_dev_t *g = &GPIO; // this is the GPIO registers, see "extern gpio_dev_t GPIO" from file:gpio_struct.h
- /* Setup the pins as "Simple GPIO outputs" see section 19.3.3 of the ESP32-S2 Reference Manual */
- /* Enable pins with "enable_w1ts" */
+ // Setup the pins as "Simple GPIO outputs" see section 19.3.3 of the ESP32-S2 Reference Manual
+ // Enable pins with "enable_w1ts"
for (uint8_t i = 0; i < 8; i++) {
g->enable_w1ts = (0x1 << (data_pin + i));
@@ -74,10 +72,11 @@ void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* sel
}
- /* I think there is a limitation of the ESP32-S2 that does not allow single-byte writes into
- the GPIO registers. See section 10.3.3 regarding "non-aligned writes" into the registers.
- If a method for writing single-byte writes is uncovered, this code can be modified to provide
- single-byte access into the output register */
+ /* From my understanding, there is a limitation of the ESP32-S2 that does not allow single-byte writes
+ * into the GPIO registers. See section 10.3.3 regarding "non-aligned writes" into the registers.
+ * If a method for writing single-byte writes is uncovered, this code can be modified to provide
+ * single-byte access into the output register
+ */
self->bus = (uint32_t*) &g->out; //pointer to GPIO output register (for pins 0-31)
@@ -100,14 +99,16 @@ void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* sel
self->data0_pin = data_pin;
self->write_group = &GPIO;
- /* Should modify the .h structure definitions if want to allow a write pin >= 32.
- If so, consider putting separate "clear_write" and "set_write" pointers into the .h in place of "write_group"
- to select between out_w1tc/out1_w1tc (clear) and out_w1ts/out1_w1ts (set) registers. */
+ /* If we want to allow a write pin >= 32, should consider putting separate "clear_write" and
+ * "set_write" pointers into the .h in place of "write_group"
+ * to select between out_w1tc/out1_w1tc (clear) and out_w1ts/out1_w1ts (set) registers.
+ */
self->write_mask = 1 << (write->number % 32); /* the write pin triggers the LCD to latch the data */
/* Note: As currently written for the ESP32-S2 port, the write pin must be a pin number less than 32
- This could be updated to accommodate 32 and higher by using the different construction of the
- address for writing to output pins >= 32, see related note above for 'self->write_group' */
+ * This could be updated to accommodate 32 and higher by using the different construction of the
+ * address for writing to output pins >= 32, see related note above for 'self->write_group'
+ */
/* SNIP - common setup of the reset pin, same as from SAMD and NRF ports */
self->reset.base.type = &mp_type_NoneType;
@@ -174,57 +175,44 @@ void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byt
common_hal_digitalio_digitalinout_set_value(&self->command, byte_type == DISPLAY_DATA);
/* Currently the write pin number must be < 32.
- Future: To accommodate write pin numbers >= 32, will need to update to choose a different register
- for set/reset (out1_w1tc and out1_w1ts) */
-
- // **** Bit shifting trial
- // uint32_t* output_register = self->bus;
- // const uint8_t bit_shift=self->data0_pin;
+ * Future: To accommodate write pin numbers >= 32, will need to update to choose the correct register
+ * for the write pin set/clear (out_w1ts/out1_w1ts and out_w1tc/out1_w1tc)
+ */
uint32_t* clear_write = (uint32_t*) &self->write_group->out_w1tc;
uint32_t* set_write = (uint32_t*) &self->write_group->out_w1ts;
const uint32_t mask = self->write_mask;
-
/* Setup structures for data writing. The ESP32-S2 port differs from the SAMD and NRF ports
- because I have not found a way to write a single byte into the ESP32-S2 registers.
- For the ESP32-S2, I create a 32-bit data_buffer that is used to transfer the data bytes. */
+ * because I have not found a way to write a single byte into the ESP32-S2 registers.
+ * For the ESP32-S2, I create a 32-bit data_buffer that is used to transfer the data bytes.
+ */
- *clear_write = mask; // Clear the write pin to prepare the registers before storing register settings into data_buffer
+ *clear_write = mask; // Clear the write pin to prepare the registers before storing the
+ // register value into data_buffer
const uint32_t data_buffer = *self->bus; // store the initial output register values into the data output buffer
uint8_t* data_address = ((uint8_t*) &data_buffer) + (self->data0_pin / 8); /* address inside data_buffer where
- each data byte will be written (as offset by (data0_pin/8) number of bytes) */
-
- // *** Bit shifting trial
- // *data_address = 0; //clear the 8 data bits
-
- //mp_printf(&mp_plat_print, "\n\ndata_buffer: %x\n", data_buffer);
- //mp_printf(&mp_plat_print, "data[0]: %x\n", data[0]);
- //mp_printf(&mp_plat_print, "data_buffer[0]: %x\n\n", (data_buffer | (((uint32_t) data[0]) << self->data0_pin)));
+ * each data byte will be written to the data pin registers
+ */
for (uint32_t i = 0; i < data_length; i++) {
/* Question: Is there a faster way of stuffing the data byte into the data_buffer, is bit arithmetic
- faster than writing to the byte address? */
+ * faster than writing to the byte address?
+ */
- /* Note: May be able to eliminate either the clear_write or set_write since the data buffer
- can be written with the write pin cleared or set already, and depending upon whether the display
- latches the data on the rising or falling edge of the write pin. Remember: This method
- will require the write pin to be controlled by the same GPIO register as the data pins. */
+ /* Note: If the write pin and data pins are controlled by the same GPIO register, we can eliminate
+ * the "clear_write" step below, since the write pin is cleared when the data_buffer is written
+ * to the bus.
+ * Remember: This method requires the write pin to be controlled by the same GPIO register as the data pins.
+ */
- // Can ignore this line if the write pin is in the same register as the data pins
// *clear_write = mask; // clear the write pin (See comment above, this may not be necessary).
- // *** Original code
*(data_address) = data[i]; // stuff the data byte into the data_buffer at the correct offset byte location
*self->bus = data_buffer; // write the data to the output register
-
- // *** Bit shifting trial - didn't have much improvement in performance
- // *output_register = (data_buffer | (((uint32_t) data[i]) << bit_shift));
-
-
*set_write = mask; // set the write pin
}