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These files can also be used for F723, F732 and F733 MCUs.
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This patch adds support to mboot for programming external SPI flash. It
allows SPI flash to be programmed via a USB DFU utility in the same way
that internal MCU flash is programmed.
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Prior to this patch the QSPI driver assumed that the length of all data
reads and writes was a multiple of 4. This patch allows any length. Reads
are optimised for speed by using 32-bit transfers when possible, but writes
always use a byte transfer because they only use a single data IO line and
are relatively slow.
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Fixes issue #3880.
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And fix timeout value so that it does actually finish with reset_mode=1.
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The DMA peripheral is limited to transferring 65535 elements at a time so
in order to send more than that the SPI driver must split the transfers up.
The user must be aware of this limit if they are relying on precise timing
of the entire SPI transfer, because there might be a small delay between
the split transfers.
Fixes issue #3851, and thanks to @kwagyeman for the original fix.
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To match pin labels on other NUCLEO 64 boards.
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If the user button is held down indefinitely (eg unintenionally, or because
the GPIO signal of the user button is connected to some external device)
then it makes sense to end the reset mode cycle with the default mode of
1, which executes code as normal.
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It's possible (at least on F4 MCU's) to have RXNE and STOPF set at the same
time during a call to the slave IRQ handler. In such cases RXNE should be
handled before STOPF so that all bytes are processed before
i2c_slave_process_rx_end() is called.
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Due to buffering of outgoing bytes on the I2C bus, detection of a NACK
using the ISR_NACKF flag needs to account for the case where ISR_NACKF
corresponds to the previous-to-previous byte.
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This patch renames the existing SPI flash API functions to reflect the fact
that the go through the cache:
mp_spiflash_flush -> mp_spiflash_cache_flush
mp_spiflash_read -> mp_spiflash_cached_read
mp_spiflash_write -> mp_spiflash_cached_write
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It's a core feature, in particular required for user-streams with uasyncio.
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This calls finalisers of things like files and sockets to cleanly close
them.
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The DFU USB config descriptor returns 0x0800=2048 for the supported
transfer size, and this applies to both TX (IN) and RX (OUT). So increase
the rx_buf to support this size without having a buffer overflow on
received data.
With this patch mboot in USB DFU mode now works with dfu-util.
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MICROPY_PY_DELATTR_SETATTR can now be enabled without a performance hit for
classes that don't use this feature.
MICROPY_PY_BUILTINS_NOTIMPLEMENTED is a minor addition that improves
compatibility with CPython.
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They are now efficient (in runtime performance) and provide a useful
feature that's hard to obtain without them enabled.
See issue #3644 and PR #3826 for background.
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So they don't clash with other VFS implementations.
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The Wiznet5k series of chips support a MACRAW mode which allows the host to
send and receive Ethernet frames directly. This can be hooked into the
lwIP stack to provide a full "socket" implementation using this Wiznet
Ethernet device. This patch adds support for this feature.
To enable the feature one must add the following to mpconfigboard.mk, or
mpconfigport.mk:
MICROPY_PY_WIZNET5K = 5500
and the following to mpconfigboard.h, or mpconfigport.h:
#define MICROPY_PY_LWIP (1)
After wiring up the module (X5=CS, X4=RST), usage on a pyboard is:
import time, network
nic = network.WIZNET5K(pyb.SPI(1), pyb.Pin.board.X5, pyb.Pin.board.X4)
nic.active(1)
while not nic.isconnected():
time.sleep_ms(50) # needed to poll the NIC
print(nic.ifconfig())
Then use the socket module as usual.
Compared to using the built-in TCP/IP stack on the Wiznet module, some
performance is lost in MACRAW mode: with a lot of memory allocated to lwIP
buffers, lwIP gives Around 750,000 bytes/sec max TCP download, compared
with 1M/sec when using the TCP/IP stack on the Wiznet module.
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All it needs is a lwIP netif to function.
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mod_network_nic_type_t doesn't need to be an actual uPy type, it just needs
to be an object.
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It should be up to the NIC itself to decide if the network interface is
removed upon soft reset. Some NICs can keep the interface up over a soft
reset, which improves usability of the network.
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And update the GPIO init for NUCLEO_H743ZI to consistently use the mphal
functions.
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Pins with multiple alt-funcs for the same peripheral (eg USART_CTS_NSS)
need to be split into individual alt-funcs for make-pins.py to work
correctly.
This patch changes the following:
- Split `..._CTS_NSS` into `..._CTS/..._NSS`
- Split `..._RTS_DE` into `..._RTS/..._DE`
- Split `JTDO_SWO` into `JTDO/TRACESWO` for consistency
- Fixed `TRACECK` to `TRACECLK` for consistency
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Sourced from STM32Cube_FW_F0_V1.9.0.
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Use direct register access to get the APB clock divider. This reduces code
size and makes the code more efficient.
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If no block devices are defined by a board then storage support will be
disabled. This means there is no filesystem provided by either the
internal flash or external SPI flash. But the VFS system can still be
enabled and filesystems provided on external devices like an SD card.
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With this change, all the USB source code can now be passed through the
compiler even if the MCU does not have a USB peripheral.
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Mboot is a custom bootloader for STM32 MCUs. It can provide a USB DFU
interface on either the FS or HS peripherals, as well as a custom I2C
bootloader interface.
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These files provide no additional information, all the version and license
information is captured in the relevant files in these subdirectories.
Thanks to @JoeSc for the original patch.
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This patch allows to use lwIP as the implementation of the usocket module,
instead of the existing socket-multiplexer that delegates the entire TCP/IP
layer to the NIC itself.
This is disabled by default, and enabled by defining MICROPY_PY_LWIP to 1.
When enabled, the lwIP TCP/IP stack will be included in the build with
default settings for memory usage and performance (see
lwip_inc/lwipopts.h). It is then up to a particular NIC to register itself
with lwIP using the standard lwIP netif API.
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The hardware doesn't allow it, instead the value is reset to 255 upon
setting the other calendar/time values.
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