diff options
| author | Dean <Dean@d5102386-fcda-11dd-9fdb-3debd5008f28> | 2010-06-24 08:12:27 +0000 |
|---|---|---|
| committer | Dean <Dean@d5102386-fcda-11dd-9fdb-3debd5008f28> | 2010-06-24 08:12:27 +0000 |
| commit | 631d12aaba3da0b445345d2e89ad02f79c828aa4 (patch) | |
| tree | d85b5bb45497706d728d585bb404d9f7f936b226 /Projects/XPLAINBridge | |
| parent | 615c8894b41c3145d3755f8ca63ff68a32ab6e12 (diff) | |
Make XPLAINBridge serial bridge much more reliable for the reception of characters from the XMEGA through the software UART interface.
git-svn-id: http://lufa-lib.googlecode.com/svn/trunk@1351 d5102386-fcda-11dd-9fdb-3debd5008f28
Diffstat (limited to 'Projects/XPLAINBridge')
| -rw-r--r-- | Projects/XPLAINBridge/Lib/SoftUART.c | 16 |
1 files changed, 5 insertions, 11 deletions
diff --git a/Projects/XPLAINBridge/Lib/SoftUART.c b/Projects/XPLAINBridge/Lib/SoftUART.c index a23ea456..02223af9 100644 --- a/Projects/XPLAINBridge/Lib/SoftUART.c +++ b/Projects/XPLAINBridge/Lib/SoftUART.c @@ -79,18 +79,12 @@ ISR(INT0_vect, ISR_BLOCK) RX_Data = 0; RX_BitMask = (1 << 0); - /* Check that the start bit is still low to prevent noise from triggering a reception */ - if (!(SRXPIN & (1 << SRX))) - { - /* Clear reception channel ISR flag in case it is pending */ - TIFR1 = (1 << OCF1A); - - /* Still low, enable bit receive ISR */ - TIMSK1 = (1 << OCIE1A); + /* Clear reception channel ISR flag and enable the bit reception ISR */ + TIFR1 = (1 << OCF1A); + TIMSK1 = (1 << OCIE1A); - /* Clear the start bit detection ISR flag */ - EIMSK &= ~(1 << INT0); - } + /* Disable start bit detection ISR while the next byte is received */ + EIMSK &= ~(1 << INT0); } /** ISR to manage the reception of bits to the software UART. */ |