Merge remote-tracking branch 'adafruit/master' into vectorio

60 files changed, 997 insertions, 90 deletions

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 2125a7c72..826ca279c 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -216,11 +216,13 @@ jobs:
         - "pewpew10"
         - "pewpew_m4"
         - "pirkey_m0"
+        - "pitaya_go"
         - "pyb_nano_v2"
         - "pybadge"
         - "pybadge_airlift"
         - "pyboard_v11"
         - "pycubed"
+        - "pycubed_mram"
         - "pygamer"
         - "pygamer_advance"
         - "pyportal"
@@ -249,6 +251,7 @@ jobs:
         - "stm32f746g_discovery"
         - "stringcar_m0_express"
         - "teensy40"
+        - "teensy41"
         - "teknikio_bluebird"
         - "thunderpack"
         - "trellis_m4_express"
diff --git a/extmod/modujson.c b/extmod/modujson.c
index 6b24bf578..0f93ccb11 100644
--- a/extmod/modujson.c
+++ b/extmod/modujson.c
@@ -53,6 +53,10 @@ STATIC mp_obj_t mod_ujson_dumps(mp_obj_t obj) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(mod_ujson_dumps_obj, mod_ujson_dumps);
 
+#define JSON_DEBUG(...) (void)0
+// #define JSON_DEBUG(...) mp_printf(&mp_plat_print __VA_OPT__(,) __VA_ARGS__)
+
+
 // The function below implements a simple non-recursive JSON parser.
 //
 // The JSON specification is at http://www.ietf.org/rfc/rfc4627.txt
@@ -80,6 +84,7 @@ typedef struct _ujson_stream_t {
 
 STATIC byte ujson_stream_next(ujson_stream_t *s) {
     mp_uint_t ret = s->read(s->stream_obj, &s->cur, 1, &s->errcode);
+    JSON_DEBUG("  usjon_stream_next err:%2d cur: %c \n", s->errcode, s->cur);
     if (s->errcode != 0) {
         mp_raise_OSError(s->errcode);
     }
@@ -89,9 +94,10 @@ STATIC byte ujson_stream_next(ujson_stream_t *s) {
     return s->cur;
 }
 
-STATIC mp_obj_t mod_ujson_load(mp_obj_t stream_obj) {
+STATIC mp_obj_t _mod_ujson_load(mp_obj_t stream_obj, bool return_first_json) {
     const mp_stream_p_t *stream_p = mp_get_stream_raise(stream_obj, MP_STREAM_OP_READ);
     ujson_stream_t s = {stream_obj, stream_p->read, 0, 0};
+    JSON_DEBUG("got JSON stream\n");
     vstr_t vstr;
     vstr_init(&vstr, 8);
     mp_obj_list_t stack; // we use a list as a simple stack for nested JSON
@@ -262,13 +268,18 @@ STATIC mp_obj_t mod_ujson_load(mp_obj_t stream_obj) {
         }
     }
     success:
-    // eat trailing whitespace
-    while (unichar_isspace(S_CUR(s))) {
-        S_NEXT(s);
-    }
-    if (!S_END(s)) {
-        // unexpected chars
-        goto fail;
+    // It is legal for a stream to have contents after JSON.
+    // E.g., A UART is not closed after receiving an object; in load() we will
+    //   return the first complete JSON object, while in loads() we will retain
+    //   strict adherence to the buffer's complete semantic.
+    if (!return_first_json) {
+        while (unichar_isspace(S_CUR(s))) {
+            S_NEXT(s);
+        }
+        if (!S_END(s)) {
+            // unexpected chars
+            goto fail;
+        }
     }
     if (stack_top == MP_OBJ_NULL || stack.len != 0) {
         // not exactly 1 object
@@ -280,6 +291,10 @@ STATIC mp_obj_t mod_ujson_load(mp_obj_t stream_obj) {
     fail:
     mp_raise_ValueError(translate("syntax error in JSON"));
 }
+
+STATIC mp_obj_t mod_ujson_load(mp_obj_t stream_obj) {
+    return _mod_ujson_load(stream_obj, true);
+}
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(mod_ujson_load_obj, mod_ujson_load);
 
 STATIC mp_obj_t mod_ujson_loads(mp_obj_t obj) {
@@ -287,7 +302,7 @@ STATIC mp_obj_t mod_ujson_loads(mp_obj_t obj) {
     const char *buf = mp_obj_str_get_data(obj, &len);
     vstr_t vstr = {len, len, (char*)buf, true};
     mp_obj_stringio_t sio = {{&mp_type_stringio}, &vstr, 0, MP_OBJ_NULL};
-    return mod_ujson_load(MP_OBJ_FROM_PTR(&sio));
+    return _mod_ujson_load(MP_OBJ_FROM_PTR(&sio), false);
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(mod_ujson_loads_obj, mod_ujson_loads);
 
diff --git a/locale/ID.po b/locale/ID.po
index 8fccb8c1a..21239c4d6 100644
--- a/locale/ID.po
+++ b/locale/ID.po
@@ -8,7 +8,7 @@ msgid ""
 msgstr ""
 "Project-Id-Version: PACKAGE VERSION\n"
 "Report-Msgid-Bugs-To: \n"
-"POT-Creation-Date: 2020-05-09 16:44-0700\n"
+"POT-Creation-Date: 2020-05-12 12:24-0700\n"
 "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
 "Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
 "Language-Team: LANGUAGE <LL@li.org>\n"
@@ -1152,6 +1152,10 @@ msgstr "Tidak ada dukungan hardware untuk pin"
 msgid "No key was specified"
 msgstr ""
 
+#: shared-bindings/time/__init__.c
+msgid "No long integer support"
+msgstr ""
+
 #: ports/stm/common-hal/pulseio/PWMOut.c
 msgid "No more timers available on this pin."
 msgstr ""
diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot
index dd0162c2c..741f45f25 100644
--- a/locale/circuitpython.pot
+++ b/locale/circuitpython.pot
@@ -8,7 +8,7 @@ msgid ""
 msgstr ""
 "Project-Id-Version: PACKAGE VERSION\n"
 "Report-Msgid-Bugs-To: \n"
-"POT-Creation-Date: 2020-05-09 16:44-0700\n"
+"POT-Creation-Date: 2020-05-12 12:24-0700\n"
 "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
 "Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
 "Language-Team: LANGUAGE <LL@li.org>\n"
@@ -1141,6 +1141,10 @@ msgstr ""
 msgid "No key was specified"
 msgstr ""
 
+#: shared-bindings/time/__init__.c
+msgid "No long integer support"
+msgstr ""
+
 #: ports/stm/common-hal/pulseio/PWMOut.c
 msgid "No more timers available on this pin."
 msgstr ""
diff --git a/locale/de_DE.po b/locale/de_DE.po
index 476962dd2..67b6ea8b5 100644
--- a/locale/de_DE.po
+++ b/locale/de_DE.po
@@ -7,7 +7,7 @@ msgid ""
 msgstr ""
 "Project-Id-Version: \n"
 "Report-Msgid-Bugs-To: \n"
-"POT-Creation-Date: 2020-05-09 16:44-0700\n"
+"POT-Creation-Date: 2020-05-12 12:24-0700\n"
 "PO-Revision-Date: 2020-04-30 17:01+0000\n"
 "Last-Translator: Jeff Epler <jepler@gmail.com>\n"
 "Language-Team: German <https://later.unpythonic.net/projects/circuitpython/"
@@ -1157,6 +1157,10 @@ msgstr "Keine Hardwareunterstützung an diesem Pin"
 msgid "No key was specified"
 msgstr ""
 
+#: shared-bindings/time/__init__.c
+msgid "No long integer support"
+msgstr ""
+
 #: ports/stm/common-hal/pulseio/PWMOut.c
 msgid "No more timers available on this pin."
 msgstr ""
diff --git a/locale/en_US.po b/locale/en_US.po
index b1b03a3e7..5408767de 100644
--- a/locale/en_US.po
+++ b/locale/en_US.po
@@ -7,7 +7,7 @@ msgid ""
 msgstr ""
 "Project-Id-Version: \n"
 "Report-Msgid-Bugs-To: \n"
-"POT-Creation-Date: 2020-05-09 16:44-0700\n"
+"POT-Creation-Date: 2020-05-12 12:24-0700\n"
 "PO-Revision-Date: 2018-07-27 11:55-0700\n"
 "Last-Translator: \n"
 "Language-Team: \n"
@@ -1141,6 +1141,10 @@ msgstr ""
 msgid "No key was specified"
 msgstr ""
 
+#: shared-bindings/time/__init__.c
+msgid "No long integer support"
+msgstr ""
+
 #: ports/stm/common-hal/pulseio/PWMOut.c
 msgid "No more timers available on this pin."
 msgstr ""
diff --git a/locale/en_x_pirate.po b/locale/en_x_pirate.po
index 9828932be..d6c4c7ba5 100644
--- a/locale/en_x_pirate.po
+++ b/locale/en_x_pirate.po
@@ -7,7 +7,7 @@ msgid ""
 msgstr ""
 "Project-Id-Version: \n"
 "Report-Msgid-Bugs-To: \n"
-"POT-Creation-Date: 2020-05-09 16:44-0700\n"
+"POT-Creation-Date: 2020-05-12 12:24-0700\n"
 "PO-Revision-Date: 2020-03-30 22:11+0000\n"
 "Last-Translator: Tannewt <devnull@unpythonic.net>\n"
 "Language-Team: English <https://later.unpythonic.net/projects/circuitpython/"
@@ -1150,6 +1150,10 @@ msgstr ""
 msgid "No key was specified"
 msgstr ""
 
+#: shared-bindings/time/__init__.c
+msgid "No long integer support"
+msgstr ""
+
 #: ports/stm/common-hal/pulseio/PWMOut.c
 msgid "No more timers available on this pin."
 msgstr ""
diff --git a/locale/es.po b/locale/es.po
index 0c7ba72ac..5ccd3dd9c 100644
--- a/locale/es.po
+++ b/locale/es.po
@@ -7,7 +7,7 @@ msgid ""
 msgstr ""
 "Project-Id-Version: \n"
 "Report-Msgid-Bugs-To: \n"
-"POT-Creation-Date: 2020-05-09 16:44-0700\n"
+"POT-Creation-Date: 2020-05-12 12:24-0700\n"
 "PO-Revision-Date: 2018-08-24 22:56-0500\n"
 "Last-Translator: \n"
 "Language-Team: \n"
@@ -1149,6 +1149,10 @@ msgstr "Sin soporte de hardware en pin"
 msgid "No key was specified"
 msgstr ""
 
+#: shared-bindings/time/__init__.c
+msgid "No long integer support"
+msgstr ""
+
 #: ports/stm/common-hal/pulseio/PWMOut.c
 msgid "No more timers available on this pin."
 msgstr ""
diff --git a/locale/fil.po b/locale/fil.po
index 44206d6e7..fc7adb9dd 100644
--- a/locale/fil.po
+++ b/locale/fil.po
@@ -7,7 +7,7 @@ msgid ""
 msgstr ""
 "Project-Id-Version: \n"
 "Report-Msgid-Bugs-To: \n"
-"POT-Creation-Date: 2020-05-09 16:44-0700\n"
+"POT-Creation-Date: 2020-05-12 12:24-0700\n"
 "PO-Revision-Date: 2018-12-20 22:15-0800\n"
 "Last-Translator: Timothy <me@timothygarcia.ca>\n"
 "Language-Team: fil\n"
@@ -1157,6 +1157,10 @@ msgstr "Walang support sa hardware ang pin"
 msgid "No key was specified"
 msgstr ""
 
+#: shared-bindings/time/__init__.c
+msgid "No long integer support"
+msgstr ""
+
 #: ports/stm/common-hal/pulseio/PWMOut.c
 msgid "No more timers available on this pin."
 msgstr ""
diff --git a/locale/fr.po b/locale/fr.po
index 61263f6c3..39e56c6cc 100644
--- a/locale/fr.po
+++ b/locale/fr.po
@@ -8,7 +8,7 @@ msgid ""
 msgstr ""
 "Project-Id-Version: 0.1\n"
 "Report-Msgid-Bugs-To: \n"
-"POT-Creation-Date: 2020-05-09 16:44-0700\n"
+"POT-Creation-Date: 2020-05-12 12:24-0700\n"
 "PO-Revision-Date: 2020-05-05 20:24+0000\n"
 "Last-Translator: Jeff Epler <jepler@gmail.com>\n"
 "Language-Team: French <https://later.unpythonic.net/projects/circuitpython/"
@@ -1171,6 +1171,10 @@ msgstr "Pas de support matériel pour cette broche"
 msgid "No key was specified"
 msgstr ""
 
+#: shared-bindings/time/__init__.c
+msgid "No long integer support"
+msgstr ""
+
 #: ports/stm/common-hal/pulseio/PWMOut.c
 msgid "No more timers available on this pin."
 msgstr ""
diff --git a/locale/it_IT.po b/locale/it_IT.po
index 17895aa3f..983f25c59 100644
--- a/locale/it_IT.po
+++ b/locale/it_IT.po
@@ -8,7 +8,7 @@ msgid ""
 msgstr ""
 "Project-Id-Version: PACKAGE VERSION\n"
 "Report-Msgid-Bugs-To: \n"
-"POT-Creation-Date: 2020-05-09 16:44-0700\n"
+"POT-Creation-Date: 2020-05-12 12:24-0700\n"
 "PO-Revision-Date: 2018-10-02 16:27+0200\n"
 "Last-Translator: Enrico Paganin <enrico.paganin@mail.com>\n"
 "Language-Team: \n"
@@ -1161,6 +1161,10 @@ msgstr "Nessun supporto hardware sul pin"
 msgid "No key was specified"
 msgstr ""
 
+#: shared-bindings/time/__init__.c
+msgid "No long integer support"
+msgstr ""
+
 #: ports/stm/common-hal/pulseio/PWMOut.c
 msgid "No more timers available on this pin."
 msgstr ""
diff --git a/locale/ko.po b/locale/ko.po
index 51bbad564..5e2515b83 100644
--- a/locale/ko.po
+++ b/locale/ko.po
@@ -8,7 +8,7 @@ msgid ""
 msgstr ""
 "Project-Id-Version: PACKAGE VERSION\n"
 "Report-Msgid-Bugs-To: \n"
-"POT-Creation-Date: 2020-05-09 16:44-0700\n"
+"POT-Creation-Date: 2020-05-12 12:24-0700\n"
 "PO-Revision-Date: 2019-05-06 14:22-0700\n"
 "Last-Translator: \n"
 "Language-Team: LANGUAGE <LL@li.org>\n"
@@ -1145,6 +1145,10 @@ msgstr ""
 msgid "No key was specified"
 msgstr ""
 
+#: shared-bindings/time/__init__.c
+msgid "No long integer support"
+msgstr ""
+
 #: ports/stm/common-hal/pulseio/PWMOut.c
 msgid "No more timers available on this pin."
 msgstr ""
diff --git a/locale/pl.po b/locale/pl.po
index 5c71601b6..350dab995 100644
--- a/locale/pl.po
+++ b/locale/pl.po
@@ -7,7 +7,7 @@ msgid ""
 msgstr ""
 "Project-Id-Version: \n"
 "Report-Msgid-Bugs-To: \n"
-"POT-Creation-Date: 2020-05-09 16:44-0700\n"
+"POT-Creation-Date: 2020-05-12 12:24-0700\n"
 "PO-Revision-Date: 2019-03-19 18:37-0700\n"
 "Last-Translator: Radomir Dopieralski <circuitpython@sheep.art.pl>\n"
 "Language-Team: pl\n"
@@ -1146,6 +1146,10 @@ msgstr "Brak sprzętowej obsługi na nóżce"
 msgid "No key was specified"
 msgstr ""
 
+#: shared-bindings/time/__init__.c
+msgid "No long integer support"
+msgstr ""
+
 #: ports/stm/common-hal/pulseio/PWMOut.c
 msgid "No more timers available on this pin."
 msgstr ""
diff --git a/locale/pt_BR.po b/locale/pt_BR.po
index 166905635..ffca8aa91 100644
--- a/locale/pt_BR.po
+++ b/locale/pt_BR.po
@@ -8,7 +8,7 @@ msgid ""
 msgstr ""
 "Project-Id-Version: PACKAGE VERSION\n"
 "Report-Msgid-Bugs-To: \n"
-"POT-Creation-Date: 2020-05-09 16:44-0700\n"
+"POT-Creation-Date: 2020-05-12 12:24-0700\n"
 "PO-Revision-Date: 2018-10-02 21:14-0000\n"
 "Last-Translator: \n"
 "Language-Team: \n"
@@ -1153,6 +1153,10 @@ msgstr "Nenhum suporte de hardware no pino"
 msgid "No key was specified"
 msgstr ""
 
+#: shared-bindings/time/__init__.c
+msgid "No long integer support"
+msgstr ""
+
 #: ports/stm/common-hal/pulseio/PWMOut.c
 msgid "No more timers available on this pin."
 msgstr ""
diff --git a/locale/sv.po b/locale/sv.po
index 15fb0ee84..1db16d756 100644
--- a/locale/sv.po
+++ b/locale/sv.po
@@ -8,7 +8,7 @@ msgid ""
 msgstr ""
 "Project-Id-Version: PACKAGE VERSION\n"
 "Report-Msgid-Bugs-To: \n"
-"POT-Creation-Date: 2020-05-09 16:44-0700\n"
+"POT-Creation-Date: 2020-05-12 12:24-0700\n"
 "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
 "Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
 "Language-Team: LANGUAGE <LL@li.org>\n"
@@ -1141,6 +1141,10 @@ msgstr ""
 msgid "No key was specified"
 msgstr ""
 
+#: shared-bindings/time/__init__.c
+msgid "No long integer support"
+msgstr ""
+
 #: ports/stm/common-hal/pulseio/PWMOut.c
 msgid "No more timers available on this pin."
 msgstr ""
diff --git a/locale/zh_Latn_pinyin.po b/locale/zh_Latn_pinyin.po
index 1905ead0a..e1c8d5e9d 100644
--- a/locale/zh_Latn_pinyin.po
+++ b/locale/zh_Latn_pinyin.po
@@ -7,7 +7,7 @@ msgid ""
 msgstr ""
 "Project-Id-Version: circuitpython-cn\n"
 "Report-Msgid-Bugs-To: \n"
-"POT-Creation-Date: 2020-05-09 16:44-0700\n"
+"POT-Creation-Date: 2020-05-12 12:24-0700\n"
 "PO-Revision-Date: 2019-04-13 10:10-0700\n"
 "Last-Translator: hexthat\n"
 "Language-Team: Chinese Hanyu Pinyin\n"
@@ -1154,6 +1154,10 @@ msgstr "Méiyǒu zài yǐn jiǎo shàng de yìngjiàn zhīchí"
 msgid "No key was specified"
 msgstr ""
 
+#: shared-bindings/time/__init__.c
+msgid "No long integer support"
+msgstr ""
+
 #: ports/stm/common-hal/pulseio/PWMOut.c
 msgid "No more timers available on this pin."
 msgstr "Gāi yǐn jiǎo shàng méiyǒu kěyòng de dìngshí qì."
diff --git a/ports/atmel-samd/boards/pycubed/mpconfigboard.h b/ports/atmel-samd/boards/pycubed/mpconfigboard.h
index 49a98e8d4..8d046c75b 100644
--- a/ports/atmel-samd/boards/pycubed/mpconfigboard.h
+++ b/ports/atmel-samd/boards/pycubed/mpconfigboard.h
@@ -3,6 +3,7 @@
 #define MICROPY_HW_MCU_NAME "samd51j19"
 #define CIRCUITPY_MCU_FAMILY samd51
 
+#define MICROPY_HW_LED_STATUS (&pin_PA16)
 #define MICROPY_HW_NEOPIXEL   (&pin_PA21)
 
 #define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11)
@@ -16,6 +17,7 @@
 
 #define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE)
 
+// External flash W25Q80DV 
 #define EXTERNAL_FLASH_QSPI_DUAL
 
 #define BOARD_HAS_CRYSTAL 1
diff --git a/ports/atmel-samd/boards/pycubed/mpconfigboard.mk b/ports/atmel-samd/boards/pycubed/mpconfigboard.mk
index adaeecb89..b7b8073ab 100644
--- a/ports/atmel-samd/boards/pycubed/mpconfigboard.mk
+++ b/ports/atmel-samd/boards/pycubed/mpconfigboard.mk
@@ -1,4 +1,3 @@
-LD_FILE = boards/samd51x19-bootloader-external-flash.ld
 USB_VID = 0x04D8
 USB_PID = 0xEC44
 USB_PRODUCT = "PyCubed"
@@ -12,6 +11,8 @@ EXTERNAL_FLASH_DEVICE_COUNT = 1
 EXTERNAL_FLASH_DEVICES = W25Q80DV
 LONGINT_IMPL = MPZ
 
+CIRCUITPY_DRIVE_LABEL = "PYCUBED"
+
 # Not needed.
 CIRCUITPY_AUDIOBUSIO = 0
 CIRCUITPY_DISPLAYIO = 0
diff --git a/ports/atmel-samd/boards/pycubed_mram/board.c b/ports/atmel-samd/boards/pycubed_mram/board.c
new file mode 100644
index 000000000..31b081209
--- /dev/null
+++ b/ports/atmel-samd/boards/pycubed_mram/board.c
@@ -0,0 +1,61 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+
+#include <string.h>
+
+#include "boards/board.h"
+#include "py/mpconfig.h"
+#include "shared-bindings/nvm/ByteArray.h"
+#include "common-hal/microcontroller/Pin.h"
+#include "hal/include/hal_gpio.h"
+#include "shared-bindings/pulseio/PWMOut.h"
+
+nvm_bytearray_obj_t bootcnt = {
+    .base = {
+        .type = &nvm_bytearray_type
+            },
+    .len = ( uint32_t) 8192,
+    .start_address = (uint8_t*) (0x00080000 - 8192)
+    };
+
+
+void board_init(void) {
+    pulseio_pwmout_obj_t pwm;
+    common_hal_pulseio_pwmout_construct(&pwm, &pin_PA23, 4096, 2, false);
+    common_hal_pulseio_pwmout_never_reset(&pwm);
+}
+
+bool board_requests_safe_mode(void) {
+    return false;
+}
+
+void reset_board(void) {
+    uint8_t value_out = 0;
+    common_hal_nvm_bytearray_get_bytes(&bootcnt,0,1,&value_out);
+    ++value_out;
+    common_hal_nvm_bytearray_set_bytes(&bootcnt,0,&value_out,1);
+}
\ No newline at end of file
diff --git a/ports/atmel-samd/boards/pycubed_mram/mpconfigboard.h b/ports/atmel-samd/boards/pycubed_mram/mpconfigboard.h
new file mode 100644
index 000000000..e2a733025
--- /dev/null
+++ b/ports/atmel-samd/boards/pycubed_mram/mpconfigboard.h
@@ -0,0 +1,39 @@
+#define MICROPY_HW_BOARD_NAME "PyCubedv04-MRAM"
+#define MICROPY_HW_MCU_NAME "samd51j19"
+#define CIRCUITPY_MCU_FAMILY samd51
+
+#define MICROPY_HW_LED_STATUS (&pin_PA16)
+#define MICROPY_HW_NEOPIXEL   (&pin_PA21)
+
+#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11)
+#define MICROPY_PORT_B (PORT_PA21 | PORT_PB10 | PORT_PB11)
+#define MICROPY_PORT_C        (0)
+#define MICROPY_PORT_D 		  (0)
+
+#define SPI_FLASH_WP_PIN            &pin_PA10
+#define SPI_FLASH_HOLD_PIN          &pin_PA11
+
+// External flash MR2xH40 MRAM
+#define EXTERNAL_FLASH_QSPI_SINGLE
+#define EXTERNAL_FLASH_NO_JEDEC
+
+#define AUTORESET_DELAY_MS 500
+
+#define CIRCUITPY_INTERNAL_NVM_SIZE 8192
+
+#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE)
+
+#define BOARD_HAS_CRYSTAL 1
+
+#define DEFAULT_I2C_BUS_SCL  (&pin_PB13)
+#define DEFAULT_I2C_BUS_SDA  (&pin_PB12)
+
+#define DEFAULT_SPI_BUS_SCK  (&pin_PA13)
+#define DEFAULT_SPI_BUS_MOSI (&pin_PA12)
+#define DEFAULT_SPI_BUS_MISO (&pin_PA14)
+
+#define DEFAULT_UART_BUS_TX  (&pin_PB02)
+#define DEFAULT_UART_BUS_RX  (&pin_PB03)
+
+#define IGNORE_PIN_PA24     1
+#define IGNORE_PIN_PA25     1
diff --git a/ports/atmel-samd/boards/pycubed_mram/mpconfigboard.mk b/ports/atmel-samd/boards/pycubed_mram/mpconfigboard.mk
new file mode 100644
index 000000000..f49bb3fef
--- /dev/null
+++ b/ports/atmel-samd/boards/pycubed_mram/mpconfigboard.mk
@@ -0,0 +1,27 @@
+USB_VID = 0x04D8
+USB_PID = 0xEC44
+USB_PRODUCT = "PyCubed"
+USB_MANUFACTURER = "maholli"
+
+CHIP_VARIANT = SAMD51J19A
+CHIP_FAMILY = samd51
+
+QSPI_FLASH_FILESYSTEM = 1
+EXTERNAL_FLASH_DEVICE_COUNT = 1
+EXTERNAL_FLASH_DEVICES = MR2xH40
+LONGINT_IMPL = MPZ
+
+CIRCUITPY_DRIVE_LABEL = "PYCUBED"
+
+# Not needed.
+CIRCUITPY_AUDIOBUSIO = 0
+CIRCUITPY_DISPLAYIO = 0
+CIRCUITPY_FRAMEBUFFERIO = 0
+CIRCUITPY_GAMEPAD = 0
+CIRCUITPY_RGBMATRIX = 0
+CIRCUITPY_PS2IO = 0
+
+FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice
+FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel
+FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Register
+FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_SD
diff --git a/ports/atmel-samd/boards/pycubed_mram/pins.c b/ports/atmel-samd/boards/pycubed_mram/pins.c
new file mode 100644
index 000000000..e494fb54b
--- /dev/null
+++ b/ports/atmel-samd/boards/pycubed_mram/pins.c
@@ -0,0 +1,55 @@
+#include "shared-bindings/board/__init__.h"
+#include "boards/board.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+    { MP_ROM_QSTR(MP_QSTR_SCK),      MP_ROM_PTR(&pin_PA13)  },
+    { MP_ROM_QSTR(MP_QSTR_MOSI),     MP_ROM_PTR(&pin_PA12)  },
+    { MP_ROM_QSTR(MP_QSTR_MISO),     MP_ROM_PTR(&pin_PA14)  },
+    { MP_ROM_QSTR(MP_QSTR_xSDCS),    MP_ROM_PTR(&pin_PA27)  },
+
+    { MP_ROM_QSTR(MP_QSTR_RELAY_A),  MP_ROM_PTR(&pin_PB15)  },
+    { MP_ROM_QSTR(MP_QSTR_BURN1),    MP_ROM_PTR(&pin_PB31)  },
+    { MP_ROM_QSTR(MP_QSTR_BURN2),    MP_ROM_PTR(&pin_PA15)  },
+
+    { MP_ROM_QSTR(MP_QSTR_BATTERY),  MP_ROM_PTR(&pin_PA06)  },
+    { MP_ROM_QSTR(MP_QSTR_L1PROG),   MP_ROM_PTR(&pin_PA07)  },
+    { MP_ROM_QSTR(MP_QSTR_AIN4),     MP_ROM_PTR(&pin_PA04)  },
+    { MP_ROM_QSTR(MP_QSTR_AIN5),     MP_ROM_PTR(&pin_PA05)  },
+    { MP_ROM_QSTR(MP_QSTR_CHRG),     MP_ROM_PTR(&pin_PB08)  },
+    { MP_ROM_QSTR(MP_QSTR_DAC0),     MP_ROM_PTR(&pin_PA02)  },
+    { MP_ROM_QSTR(MP_QSTR_PA17),     MP_ROM_PTR(&pin_PA17)  },
+    { MP_ROM_QSTR(MP_QSTR_PA18),     MP_ROM_PTR(&pin_PA18)  },
+    { MP_ROM_QSTR(MP_QSTR_PA19),     MP_ROM_PTR(&pin_PA19)  },
+    { MP_ROM_QSTR(MP_QSTR_PA20),     MP_ROM_PTR(&pin_PA20)  },
+    { MP_ROM_QSTR(MP_QSTR_PA22),     MP_ROM_PTR(&pin_PA22)  },
+    { MP_ROM_QSTR(MP_QSTR_PB16),     MP_ROM_PTR(&pin_PB16)  },
+    { MP_ROM_QSTR(MP_QSTR_PB17),     MP_ROM_PTR(&pin_PB17)  },
+    { MP_ROM_QSTR(MP_QSTR_PB22),     MP_ROM_PTR(&pin_PB22)  },
+    { MP_ROM_QSTR(MP_QSTR_PB23),     MP_ROM_PTR(&pin_PB23)  },
+
+    { MP_ROM_QSTR(MP_QSTR_RF1_RST),  MP_ROM_PTR(&pin_PB00)  },
+    { MP_ROM_QSTR(MP_QSTR_RF1_CS),   MP_ROM_PTR(&pin_PB30)  },
+    { MP_ROM_QSTR(MP_QSTR_RF1_IO0),  MP_ROM_PTR(&pin_PB05)  },
+    { MP_ROM_QSTR(MP_QSTR_RF1_IO4),  MP_ROM_PTR(&pin_PB04)  },
+
+    { MP_ROM_QSTR(MP_QSTR_RF2_RST),   MP_ROM_PTR(&pin_PB14)  },
+    { MP_ROM_QSTR(MP_QSTR_RF2_CS),    MP_ROM_PTR(&pin_PB09)  },
+    { MP_ROM_QSTR(MP_QSTR_RF2_IO1),   MP_ROM_PTR(&pin_PB06)  },
+    { MP_ROM_QSTR(MP_QSTR_RF2_BSY),   MP_ROM_PTR(&pin_PB07)  },
+
+    { MP_ROM_QSTR(MP_QSTR_EN_GPS),   MP_ROM_PTR(&pin_PB01)  },
+    { MP_ROM_QSTR(MP_QSTR_TX),       MP_ROM_PTR(&pin_PB02)  },
+    { MP_ROM_QSTR(MP_QSTR_RX),       MP_ROM_PTR(&pin_PB03)  },
+
+    { MP_ROM_QSTR(MP_QSTR_SDA),      MP_ROM_PTR(&pin_PB12)  },
+    { MP_ROM_QSTR(MP_QSTR_SCL),      MP_ROM_PTR(&pin_PB13)  },
+
+    { MP_ROM_QSTR(MP_QSTR_WDT_WDI),  MP_ROM_PTR(&pin_PA23)  },
+    { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA21)  },
+
+    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
+    { MP_ROM_QSTR(MP_QSTR_I2C),  MP_ROM_PTR(&board_i2c_obj)  },
+    { MP_ROM_QSTR(MP_QSTR_SPI),  MP_ROM_PTR(&board_spi_obj)  },
+
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/atmel-samd/common-hal/busio/UART.c b/ports/atmel-samd/common-hal/busio/UART.c
index 1f6b75f97..d6c13eb7e 100644
--- a/ports/atmel-samd/common-hal/busio/UART.c
+++ b/ports/atmel-samd/common-hal/busio/UART.c
@@ -45,6 +45,9 @@
 
 #include "samd/sercom.h"
 
+#define UART_DEBUG(...) (void)0
+// #define UART_DEBUG(...) mp_printf(&mp_plat_print __VA_OPT__(,) __VA_ARGS__)
+
 // Do-nothing callback needed so that usart_async code will enable rx interrupts.
 // See comment below re usart_async_register_callback()
 static void usart_async_rxc_callback(const struct usart_async_descriptor *const descr) {
diff --git a/ports/atmel-samd/supervisor/port.c b/ports/atmel-samd/supervisor/port.c
index b3903bb86..04e2c9191 100644
--- a/ports/atmel-samd/supervisor/port.c
+++ b/ports/atmel-samd/supervisor/port.c
@@ -174,6 +174,10 @@ static void rtc_init(void) {
     #endif
     NVIC_ClearPendingIRQ(RTC_IRQn);
     NVIC_EnableIRQ(RTC_IRQn);
+#if CIRCUITPY_RTC
+    rtc_reset();
+#endif
+
 }
 
 safe_mode_t port_init(void) {
diff --git a/ports/atmel-samd/supervisor/qspi_flash.c b/ports/atmel-samd/supervisor/qspi_flash.c
index eca47b164..aaed2a0ee 100644
--- a/ports/atmel-samd/supervisor/qspi_flash.c
+++ b/ports/atmel-samd/supervisor/qspi_flash.c
@@ -166,7 +166,10 @@ bool spi_flash_write_data(uint32_t address, uint8_t* data, uint32_t length) {
 bool spi_flash_read_data(uint32_t address, uint8_t* data, uint32_t length) {
     samd_peripherals_disable_and_clear_cache();
 
-    #ifdef EXTERNAL_FLASH_QSPI_DUAL
+    #ifdef EXTERNAL_FLASH_QSPI_SINGLE
+    QSPI->INSTRCTRL.bit.INSTR = CMD_READ_DATA;
+    uint32_t mode = QSPI_INSTRFRAME_WIDTH_SINGLE_BIT_SPI;
+    #elif defined(EXTERNAL_FLASH_QSPI_DUAL)
     QSPI->INSTRCTRL.bit.INSTR = CMD_DUAL_READ;
     uint32_t mode = QSPI_INSTRFRAME_WIDTH_DUAL_OUTPUT;
     #else
@@ -174,6 +177,15 @@ bool spi_flash_read_data(uint32_t address, uint8_t* data, uint32_t length) {
     uint32_t mode = QSPI_INSTRFRAME_WIDTH_QUAD_OUTPUT;
     #endif
 
+    #ifdef EXTERNAL_FLASH_QSPI_SINGLE
+    QSPI->INSTRFRAME.reg = mode |
+                           QSPI_INSTRFRAME_ADDRLEN_24BITS |
+                           QSPI_INSTRFRAME_TFRTYPE_READMEMORY |
+                           QSPI_INSTRFRAME_INSTREN |
+                           QSPI_INSTRFRAME_ADDREN |
+                           QSPI_INSTRFRAME_DATAEN |
+                           QSPI_INSTRFRAME_DUMMYLEN(0);
+    #else
     QSPI->INSTRFRAME.reg = mode |
                            QSPI_INSTRFRAME_ADDRLEN_24BITS |
                            QSPI_INSTRFRAME_TFRTYPE_READMEMORY |
@@ -181,6 +193,7 @@ bool spi_flash_read_data(uint32_t address, uint8_t* data, uint32_t length) {
                            QSPI_INSTRFRAME_ADDREN |
                            QSPI_INSTRFRAME_DATAEN |
                            QSPI_INSTRFRAME_DUMMYLEN(8);
+    #endif
 
     memcpy(data, ((uint8_t *) QSPI_AHB) + address, length);
     // TODO(tannewt): Fix DMA and enable it.
diff --git a/ports/mimxrt10xx/boards/teensy41/board.c b/ports/mimxrt10xx/boards/teensy41/board.c
new file mode 100644
index 000000000..52dd498b3
--- /dev/null
+++ b/ports/mimxrt10xx/boards/teensy41/board.c
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
+ * Copyright (c) 2019 Artur Pacholec
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "mpconfigboard.h"
+
+void board_init(void) {
+}
+
+bool board_requests_safe_mode(void) {
+    return false;
+}
+
+void reset_board(void) {
+}
diff --git a/ports/mimxrt10xx/boards/teensy41/board.ld b/ports/mimxrt10xx/boards/teensy41/board.ld
new file mode 100644
index 000000000..8f19810a3
--- /dev/null
+++ b/ports/mimxrt10xx/boards/teensy41/board.ld
@@ -0,0 +1 @@
+_ld_reserved_flash_size = 4K;
diff --git a/ports/mimxrt10xx/boards/teensy41/flash_config.c b/ports/mimxrt10xx/boards/teensy41/flash_config.c
new file mode 100644
index 000000000..426deb884
--- /dev/null
+++ b/ports/mimxrt10xx/boards/teensy41/flash_config.c
@@ -0,0 +1,126 @@
+/*
+ * Copyright 2017 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "fsl_flexspi_nor_boot.h"
+#include "fsl_flexspi_nor_config.h"
+
+/* Component ID definition, used by tools. */
+#ifndef FSL_COMPONENT_ID
+#define FSL_COMPONENT_ID "platform.drivers.xip_device"
+#endif
+
+__attribute__((section(".boot_hdr.ivt")))
+/*************************************
+ *  IVT Data
+ *************************************/
+const ivt image_vector_table = {
+  IVT_HEADER,                         /* IVT Header */
+  IMAGE_ENTRY_ADDRESS,                /* Image Entry Function */
+  IVT_RSVD,                           /* Reserved = 0 */
+  (uint32_t)DCD_ADDRESS,              /* Address where DCD information is stored */
+  (uint32_t)BOOT_DATA_ADDRESS,        /* Address where BOOT Data Structure is stored */
+  (uint32_t)&image_vector_table,      /* Pointer to IVT Self (absolute address */
+  (uint32_t)CSF_ADDRESS,              /* Address where CSF file is stored */
+  IVT_RSVD                            /* Reserved = 0 */
+};
+
+__attribute__((section(".boot_hdr.boot_data")))
+/*************************************
+ *  Boot Data
+ *************************************/
+const BOOT_DATA_T boot_data = {
+  FLASH_BASE,                 /* boot start location */
+  FLASH_SIZE,                 /* size */
+  PLUGIN_FLAG,                /* Plugin flag*/
+  0xFFFFFFFF                  /* empty - extra data word */
+};
+
+__attribute__((section(".boot_hdr.conf")))
+// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39
+const flexspi_nor_config_t qspiflash_config = {
+    .memConfig =
+        {
+            .tag              = FLEXSPI_CFG_BLK_TAG,
+            .version          = FLEXSPI_CFG_BLK_VERSION,
+            .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
+            .csHoldTime       = 1u,
+            .csSetupTime      = 2u,
+            // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock
+            .deviceType    = kFlexSpiDeviceType_SerialNOR,
+            .sflashPadType = kSerialFlash_4Pads,
+            .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03
+            .sflashA1Size  = FLASH_SIZE,
+            .lookupTable =
+                {
+                    // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1)
+                    // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) |
+                    //  FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
+                    // Read LUTs
+                    FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
+                    FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
+                    0,
+                    0,
+
+                    0x24040405,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x00000406,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x08180420,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x081804D8,
+                    0,
+                    0,
+                    0,
+
+                    0x08180402,
+                    0x00002004,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x00000460,
+                },
+        },
+    .pageSize           = 256u,
+    .sectorSize         = 4u * 1024u,
+    .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz,
+    .blockSize          = 0x00010000,
+    .isUniformBlockSize = false,
+};
diff --git a/ports/mimxrt10xx/boards/teensy41/mpconfigboard.h b/ports/mimxrt10xx/boards/teensy41/mpconfigboard.h
new file mode 100644
index 000000000..15b8c0f34
--- /dev/null
+++ b/ports/mimxrt10xx/boards/teensy41/mpconfigboard.h
@@ -0,0 +1,18 @@
+#define MICROPY_HW_BOARD_NAME "Teensy 4.1"
+#define MICROPY_HW_MCU_NAME "IMXRT1062DVJ6A"
+
+// If you change this, then make sure to update the linker scripts as well to
+// make sure you don't overwrite code
+#define CIRCUITPY_INTERNAL_NVM_SIZE 0
+
+#define BOARD_FLASH_SIZE (8 * 1024 * 1024)
+
+#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_AD_B1_00)
+#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_AD_B1_01)
+
+#define DEFAULT_SPI_BUS_SCK  (&pin_GPIO_B0_03)
+#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_B0_02)
+#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_B0_01)
+
+#define DEFAULT_UART_BUS_RX (&pin_GPIO_AD_B0_03)
+#define DEFAULT_UART_BUS_TX (&pin_GPIO_AD_B0_02)
diff --git a/ports/mimxrt10xx/boards/teensy41/mpconfigboard.mk b/ports/mimxrt10xx/boards/teensy41/mpconfigboard.mk
new file mode 100644
index 000000000..201e0e660
--- /dev/null
+++ b/ports/mimxrt10xx/boards/teensy41/mpconfigboard.mk
@@ -0,0 +1,8 @@
+USB_VID = 0x239A
+USB_PID = 0x80AE
+USB_PRODUCT = "Teensy 4.1"
+USB_MANUFACTURER = "PJRC"
+
+CHIP_VARIANT = MIMXRT1062DVJ6A
+CHIP_FAMILY = MIMXRT1062
+FLASH = W25Q64JV
diff --git a/ports/mimxrt10xx/boards/teensy41/pins.c b/ports/mimxrt10xx/boards/teensy41/pins.c
new file mode 100644
index 000000000..5eb5ab0f5
--- /dev/null
+++ b/ports/mimxrt10xx/boards/teensy41/pins.c
@@ -0,0 +1,116 @@
+#include "shared-bindings/board/__init__.h"
+
+#include "boards/board.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+    // With USB on left. Bottom edge.
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_AD_B0_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_AD_B0_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_GPIO_AD_B0_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_AD_B0_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_AD_B0_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_GPIO_AD_B0_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_EMC_04) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_EMC_05) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_EMC_06) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_EMC_08) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_B0_10) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_B1_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_B1_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_B0_11) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_B0_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_B0_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO_B0_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_B0_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO_B0_01) },
+
+    // Bottom Edge extended for 4.1
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_GPIO_AD_B0_12) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_GPIO_AD_B0_12) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO_AD_B0_13) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_GPIO_AD_B0_13) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D26), MP_ROM_PTR(&pin_GPIO_AD_B1_14) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A12), MP_ROM_PTR(&pin_GPIO_AD_B1_14) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_GPIO_AD_B1_15) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A13), MP_ROM_PTR(&pin_GPIO_AD_B1_15) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D28), MP_ROM_PTR(&pin_GPIO_EMC_32) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D29), MP_ROM_PTR(&pin_GPIO_EMC_31) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D30), MP_ROM_PTR(&pin_GPIO_EMC_37) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D31), MP_ROM_PTR(&pin_GPIO_EMC_36) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D32), MP_ROM_PTR(&pin_GPIO_B0_12) },
+
+    // Top edge
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_B0_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO_B0_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_AD_B1_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_B1_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO_AD_B1_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_B1_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO_AD_B1_07) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_B1_07) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO_AD_B1_06) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_B1_06) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO_AD_B1_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_B1_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_AD_B1_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SDA0), MP_ROM_PTR(&pin_GPIO_AD_B1_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_GPIO_AD_B1_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_B1_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_AD_B1_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SCL0), MP_ROM_PTR(&pin_GPIO_AD_B1_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_GPIO_AD_B1_10) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO_AD_B1_10) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_GPIO_AD_B1_11) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_GPIO_AD_B1_11) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D22), MP_ROM_PTR(&pin_GPIO_AD_B1_08) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_GPIO_AD_B1_08) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_GPIO_AD_B1_09) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_GPIO_AD_B1_09) },
+
+    // Top edge extended for Teensy 4.1
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D33), MP_ROM_PTR(&pin_GPIO_EMC_07) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D34), MP_ROM_PTR(&pin_GPIO_B1_13) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D35), MP_ROM_PTR(&pin_GPIO_B1_12) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D36), MP_ROM_PTR(&pin_GPIO_B1_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D37), MP_ROM_PTR(&pin_GPIO_B1_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D38), MP_ROM_PTR(&pin_GPIO_AD_B1_12) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D39), MP_ROM_PTR(&pin_GPIO_AD_B1_13) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D40), MP_ROM_PTR(&pin_GPIO_AD_B1_04) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D41), MP_ROM_PTR(&pin_GPIO_AD_B1_05) },
+
+    // SD Card slot
+    { MP_OBJ_NEW_QSTR(MP_QSTR_DAT1), MP_ROM_PTR(&pin_GPIO_SD_B0_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D42), MP_ROM_PTR(&pin_GPIO_SD_B0_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_DAT0), MP_ROM_PTR(&pin_GPIO_SD_B0_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D43), MP_ROM_PTR(&pin_GPIO_SD_B0_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CLK), MP_ROM_PTR(&pin_GPIO_SD_B0_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D44), MP_ROM_PTR(&pin_GPIO_SD_B0_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CMD), MP_ROM_PTR(&pin_GPIO_SD_B0_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D45), MP_ROM_PTR(&pin_GPIO_SD_B0_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_DAT3), MP_ROM_PTR(&pin_GPIO_SD_B0_05) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D46), MP_ROM_PTR(&pin_GPIO_SD_B0_05) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_DAT2), MP_ROM_PTR(&pin_GPIO_SD_B0_04) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D47), MP_ROM_PTR(&pin_GPIO_SD_B0_04) },
+
+    // Flash expansion spot and PSRAM expansion spot on a shared QSPI BUS
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D48), MP_ROM_PTR(&pin_GPIO_EMC_24) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_PSRAM_CS), MP_ROM_PTR(&pin_GPIO_EMC_24) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D49), MP_ROM_PTR(&pin_GPIO_EMC_27) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_QSPI_IO1), MP_ROM_PTR(&pin_GPIO_EMC_27) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D50), MP_ROM_PTR(&pin_GPIO_EMC_28) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_QSPI_IO2), MP_ROM_PTR(&pin_GPIO_EMC_28) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D51), MP_ROM_PTR(&pin_GPIO_EMC_22) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_FLASH_CS), MP_ROM_PTR(&pin_GPIO_EMC_22) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D52), MP_ROM_PTR(&pin_GPIO_EMC_26) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_QSPI_IO0), MP_ROM_PTR(&pin_GPIO_EMC_26) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D53), MP_ROM_PTR(&pin_GPIO_EMC_25) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_QSPI_CLK), MP_ROM_PTR(&pin_GPIO_EMC_25) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D54), MP_ROM_PTR(&pin_GPIO_EMC_29) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_QSPI_IO3), MP_ROM_PTR(&pin_GPIO_EMC_29) },
+
+
+    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
+    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
+    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/nrf/boards/pitaya_go/README.md b/ports/nrf/boards/pitaya_go/README.md
new file mode 100644
index 000000000..a58b75289
--- /dev/null
+++ b/ports/nrf/boards/pitaya_go/README.md
@@ -0,0 +1,40 @@
+# Makerdiary Pitaya Go
+
+>Pitaya Go is a compact and versatile development platform for IoT solutions,
+combining the Nordic's high-end multiprotocol SoC nRF52840 and the Microchip's
+extreme low power Wi-Fi® network controller ATWINC1500B. It offers a complete
+solution for wireless connectivity with IEEE 802.11 b/g/n, Bluetooth 5, Thread
+and Zigbee, that is specifically designed for the IoT.
+Pitaya Go features a Battery Charger with power path management, 64Mbit ultra
+low power QSPI Flash memory, additional NFC-A Tag PCB Antenna, user
+programmable RGB LED and Buttons, reversible USB-C Connector and easily
+expandable Header Sockets. All these features above make this board an ideal
+choice for the next IoT project.
+
+from [Makerdiary](https://store.makerdiary.com/products/pitaya-go)
+
+
+## Installing CircuitPython submodules
+
+Before you can build, you will need to run the following commands once, which
+will install the submodules that are part of the CircuitPython ecosystem, and
+build the `mpy-cross` tool:
+
+```
+$ cd circuitpython
+$ git submodule update --init
+$ make -C mpy-cross
+```
+
+
+## Building
+```sh
+$ cd ports/nrf
+$ make BOARD=pitaya_go SD=s140 -V=1 -j4
+```
+
+# Flashing CircuitPython
+
+The Pitaya Go has a pre-programmed bootloader which can be used to program the
+Pitaya Go. Follow [the guide - How to Program Pitaya Go](https://wiki.makerdiary.com/pitaya-go/programming/)
+to flash the CircuitPython firmware.
diff --git a/ports/nrf/boards/pitaya_go/board.c b/ports/nrf/boards/pitaya_go/board.c
new file mode 100644
index 000000000..4421970ee
--- /dev/null
+++ b/ports/nrf/boards/pitaya_go/board.c
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+
+void board_init(void) {
+}
+
+bool board_requests_safe_mode(void) {
+  return false;
+}
+
+void reset_board(void) {
+
+}
diff --git a/ports/nrf/boards/pitaya_go/mpconfigboard.h b/ports/nrf/boards/pitaya_go/mpconfigboard.h
new file mode 100644
index 000000000..7f9eff716
--- /dev/null
+++ b/ports/nrf/boards/pitaya_go/mpconfigboard.h
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Glenn Ruben Bakke
+ * Copyright (c) 2018 Dan Halbert for Adafruit Industries
+ * Copyright (c) 2020 Yihui Xiong
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "nrfx/hal/nrf_gpio.h"
+
+#define MAKERDIARYPITAYAGO
+
+#define MICROPY_HW_BOARD_NAME       "Makerdiary Pitaya Go"
+#define MICROPY_HW_MCU_NAME         "nRF52840"
+
+#define MICROPY_QSPI_DATA0          NRF_GPIO_PIN_MAP(1, 6)
+#define MICROPY_QSPI_DATA1          NRF_GPIO_PIN_MAP(1, 1)
+#define MICROPY_QSPI_DATA2          NRF_GPIO_PIN_MAP(1, 5)
+#define MICROPY_QSPI_DATA3          NRF_GPIO_PIN_MAP(1, 2)
+#define MICROPY_QSPI_SCK            NRF_GPIO_PIN_MAP(1, 4)
+#define MICROPY_QSPI_CS             NRF_GPIO_PIN_MAP(1, 3)
+
+#define BOARD_HAS_CRYSTAL           1
diff --git a/ports/nrf/boards/pitaya_go/mpconfigboard.mk b/ports/nrf/boards/pitaya_go/mpconfigboard.mk
new file mode 100644
index 000000000..247ddd8ac
--- /dev/null
+++ b/ports/nrf/boards/pitaya_go/mpconfigboard.mk
@@ -0,0 +1,11 @@
+# Using Nordic's VID - https://devzone.nordicsemi.com/f/nordic-q-a/50638/usb-pid-for-nrf52840
+USB_VID = 0x1915
+USB_PID = 0xb001
+USB_PRODUCT = "Pitaya Go"
+USB_MANUFACTURER = "Makerdiary"
+
+MCU_CHIP = nrf52840
+
+QSPI_FLASH_FILESYSTEM = 1
+EXTERNAL_FLASH_DEVICE_COUNT = 1
+EXTERNAL_FLASH_DEVICES = "MX25R6435F"
diff --git a/ports/nrf/boards/pitaya_go/pins.c b/ports/nrf/boards/pitaya_go/pins.c
new file mode 100644
index 000000000..92411581b
--- /dev/null
+++ b/ports/nrf/boards/pitaya_go/pins.c
@@ -0,0 +1,64 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
+  { MP_ROM_QSTR(MP_QSTR_AIN0), MP_ROM_PTR(&pin_P0_02) },
+  { MP_ROM_QSTR(MP_QSTR_AIN1), MP_ROM_PTR(&pin_P0_03) },
+  { MP_ROM_QSTR(MP_QSTR_AIN2), MP_ROM_PTR(&pin_P0_04) },
+  { MP_ROM_QSTR(MP_QSTR_AIN3), MP_ROM_PTR(&pin_P0_05) },
+  { MP_ROM_QSTR(MP_QSTR_AIN4), MP_ROM_PTR(&pin_P0_28) },
+  { MP_ROM_QSTR(MP_QSTR_AIN5), MP_ROM_PTR(&pin_P0_29) },
+  { MP_ROM_QSTR(MP_QSTR_AIN6), MP_ROM_PTR(&pin_P0_30) },
+  { MP_ROM_QSTR(MP_QSTR_AIN7), MP_ROM_PTR(&pin_P0_31) },
+
+  { MP_ROM_QSTR(MP_QSTR_AREF), MP_ROM_PTR(&pin_P0_04) },
+  { MP_ROM_QSTR(MP_QSTR_VDIV), MP_ROM_PTR(&pin_P0_05) },
+
+  { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) },
+  { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) },
+
+  { MP_ROM_QSTR(MP_QSTR_P2), MP_ROM_PTR(&pin_P0_02) },
+  { MP_ROM_QSTR(MP_QSTR_P3), MP_ROM_PTR(&pin_P0_03) },
+  { MP_ROM_QSTR(MP_QSTR_P4), MP_ROM_PTR(&pin_P0_04) },
+  { MP_ROM_QSTR(MP_QSTR_P5), MP_ROM_PTR(&pin_P0_05) },
+  { MP_ROM_QSTR(MP_QSTR_P6), MP_ROM_PTR(&pin_P0_06) },
+  { MP_ROM_QSTR(MP_QSTR_P7), MP_ROM_PTR(&pin_P0_07) },
+  { MP_ROM_QSTR(MP_QSTR_P8), MP_ROM_PTR(&pin_P0_08) },
+  { MP_ROM_QSTR(MP_QSTR_P9), MP_ROM_PTR(&pin_P0_09) },
+  { MP_ROM_QSTR(MP_QSTR_P10), MP_ROM_PTR(&pin_P0_10) },
+  { MP_ROM_QSTR(MP_QSTR_P11), MP_ROM_PTR(&pin_P0_11) },
+  { MP_ROM_QSTR(MP_QSTR_P12), MP_ROM_PTR(&pin_P0_12) },
+  { MP_ROM_QSTR(MP_QSTR_P13), MP_ROM_PTR(&pin_P0_13) },
+  { MP_ROM_QSTR(MP_QSTR_P14), MP_ROM_PTR(&pin_P0_14) },
+  { MP_ROM_QSTR(MP_QSTR_P15), MP_ROM_PTR(&pin_P0_15) },
+  { MP_ROM_QSTR(MP_QSTR_P16), MP_ROM_PTR(&pin_P0_16) },
+  { MP_ROM_QSTR(MP_QSTR_P17), MP_ROM_PTR(&pin_P0_17) },
+  { MP_ROM_QSTR(MP_QSTR_P18), MP_ROM_PTR(&pin_P0_18) },
+  { MP_ROM_QSTR(MP_QSTR_P19), MP_ROM_PTR(&pin_P0_19) },
+  { MP_ROM_QSTR(MP_QSTR_P20), MP_ROM_PTR(&pin_P0_20) },
+  { MP_ROM_QSTR(MP_QSTR_P21), MP_ROM_PTR(&pin_P0_21) },
+  { MP_ROM_QSTR(MP_QSTR_P22), MP_ROM_PTR(&pin_P0_22) },
+  { MP_ROM_QSTR(MP_QSTR_P23), MP_ROM_PTR(&pin_P0_23) },
+  { MP_ROM_QSTR(MP_QSTR_P24), MP_ROM_PTR(&pin_P0_24) },
+  { MP_ROM_QSTR(MP_QSTR_P25), MP_ROM_PTR(&pin_P0_25) },
+  { MP_ROM_QSTR(MP_QSTR_P26), MP_ROM_PTR(&pin_P0_26) },
+  { MP_ROM_QSTR(MP_QSTR_P27), MP_ROM_PTR(&pin_P0_27) },
+  { MP_ROM_QSTR(MP_QSTR_P28), MP_ROM_PTR(&pin_P0_28) },
+  { MP_ROM_QSTR(MP_QSTR_P29), MP_ROM_PTR(&pin_P0_29) },
+  { MP_ROM_QSTR(MP_QSTR_P30), MP_ROM_PTR(&pin_P0_30) },
+  { MP_ROM_QSTR(MP_QSTR_P31), MP_ROM_PTR(&pin_P0_31) },
+
+  { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P1_04) },
+  { MP_ROM_QSTR(MP_QSTR_CSN), MP_ROM_PTR(&pin_P1_03) },
+  { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_P1_06) },
+  { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_P1_01) },
+  { MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_P1_05) },
+  { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_P1_02) },
+
+  { MP_ROM_QSTR(MP_QSTR_LED_RED), MP_ROM_PTR(&pin_P0_10) },
+  { MP_ROM_QSTR(MP_QSTR_LED_GREEN), MP_ROM_PTR(&pin_P0_11) },
+  { MP_ROM_QSTR(MP_QSTR_LED_BLUE), MP_ROM_PTR(&pin_P0_12) },
+
+  { MP_ROM_QSTR(MP_QSTR_USR_BTN), MP_ROM_PTR(&pin_P1_00) },
+};
+
+MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
diff --git a/ports/nrf/boards/simmel/mpconfigboard.h b/ports/nrf/boards/simmel/mpconfigboard.h
index 4c73e86eb..bcffb40ea 100644
--- a/ports/nrf/boards/simmel/mpconfigboard.h
+++ b/ports/nrf/boards/simmel/mpconfigboard.h
@@ -40,7 +40,7 @@
 #endif
 
 #define CIRCUITPY_INTERNAL_NVM_SIZE 0
-#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (84*1024)
+#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (80*1024)
 
 #define BOOTLOADER_SIZE                 (0x4000)  // 12 kiB
 #define CIRCUITPY_BLE_CONFIG_SIZE       (12*1024)
diff --git a/ports/nrf/boards/simmel/mpconfigboard.mk b/ports/nrf/boards/simmel/mpconfigboard.mk
index e71ada1de..36a6fadda 100644
--- a/ports/nrf/boards/simmel/mpconfigboard.mk
+++ b/ports/nrf/boards/simmel/mpconfigboard.mk
@@ -11,6 +11,7 @@ MCU_CHIP = nrf52833
 
 INTERNAL_FLASH_FILESYSTEM = 1
 
+CIRCUITPY_AESIO = 1
 CIRCUITPY_AUDIOMP3 = 0
 CIRCUITPY_BUSIO = 1
 CIRCUITPY_DISPLAYIO = 0
@@ -29,4 +30,4 @@ CIRCUITPY_ULAB = 0
 
 # These defines must be overridden before mpconfigboard.h is included, which is
 # why they are passed on the command line.
-CFLAGS += -DSPIM3_BUFFER_SIZE=0 -DSOFTDEVICE_RAM_SIZE='(32*1024)'
+CFLAGS += -DSPIM3_BUFFER_SIZE=0 -DSOFTDEVICE_RAM_SIZE='(32*1024)' -DNRFX_SPIM3_ENABLED=0
diff --git a/ports/nrf/boards/simmel/pins.c b/ports/nrf/boards/simmel/pins.c
index c946493d4..6c572cae2 100644
--- a/ports/nrf/boards/simmel/pins.c
+++ b/ports/nrf/boards/simmel/pins.c
@@ -1,7 +1,7 @@
 #include "shared-bindings/board/__init__.h"
 
 STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_SPI_CSN), MP_ROM_PTR(&pin_P0_06) },
+    { MP_ROM_QSTR(MP_QSTR_SPI_CSN), MP_ROM_PTR(&pin_P1_06) },
     { MP_ROM_QSTR(MP_QSTR_SPI_MISO), MP_ROM_PTR(&pin_P1_04) },
     { MP_ROM_QSTR(MP_QSTR_SPI_MOSI), MP_ROM_PTR(&pin_P0_09) },
     { MP_ROM_QSTR(MP_QSTR_SPI_SCK), MP_ROM_PTR(&pin_P0_10) },
diff --git a/ports/nrf/nrfx_config.h b/ports/nrf/nrfx_config.h
index 05ec95ae3..7a7f2e6d6 100644
--- a/ports/nrf/nrfx_config.h
+++ b/ports/nrf/nrfx_config.h
@@ -41,12 +41,14 @@
 #define NRFX_SPIM1_ENABLED 1
 #endif
 #define NRFX_SPIM2_ENABLED 1
+#ifndef NRFX_SPIM3_ENABLED
 #if defined(NRF52840_XXAA) || defined(NRF52833_XXAA)
     #define NRFX_SPIM_EXTENDED_ENABLED 1
     #define NRFX_SPIM3_ENABLED 1
 #elif CIRCUITPY_NRF_NUM_I2C == 2
     #define NRFX_SPIM3_ENABLED 0
 #endif
+#endif
 
 
 #define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY 7
diff --git a/ports/stm/boards/STM32F401xd_fs.ld b/ports/stm/boards/STM32F401xd_fs.ld
index 3086c2c6b..69bae46cb 100644
--- a/ports/stm/boards/STM32F401xd_fs.ld
+++ b/ports/stm/boards/STM32F401xd_fs.ld
@@ -13,7 +13,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F401xe_boot.ld b/ports/stm/boards/STM32F401xe_boot.ld
index 040947694..37827c330 100644
--- a/ports/stm/boards/STM32F401xe_boot.ld
+++ b/ports/stm/boards/STM32F401xe_boot.ld
@@ -12,7 +12,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F401xe_fs.ld b/ports/stm/boards/STM32F401xe_fs.ld
index b55bc4bb4..20247930c 100644
--- a/ports/stm/boards/STM32F401xe_fs.ld
+++ b/ports/stm/boards/STM32F401xe_fs.ld
@@ -13,7 +13,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F405_boot.ld b/ports/stm/boards/STM32F405_boot.ld
index 906f56e0d..5768d1a01 100644
--- a/ports/stm/boards/STM32F405_boot.ld
+++ b/ports/stm/boards/STM32F405_boot.ld
@@ -13,7 +13,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define the top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F405_default.ld b/ports/stm/boards/STM32F405_default.ld
index 0aafdbcac..4c11fd7cf 100644
--- a/ports/stm/boards/STM32F405_default.ld
+++ b/ports/stm/boards/STM32F405_default.ld
@@ -13,7 +13,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F405_fs.ld b/ports/stm/boards/STM32F405_fs.ld
index bff312660..e6c66127f 100644
--- a/ports/stm/boards/STM32F405_fs.ld
+++ b/ports/stm/boards/STM32F405_fs.ld
@@ -14,7 +14,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F407_fs.ld b/ports/stm/boards/STM32F407_fs.ld
index 5330b4116..f06c19d99 100644
--- a/ports/stm/boards/STM32F407_fs.ld
+++ b/ports/stm/boards/STM32F407_fs.ld
@@ -14,7 +14,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F411_fs.ld b/ports/stm/boards/STM32F411_fs.ld
index 82c7aea06..1b45f235f 100644
--- a/ports/stm/boards/STM32F411_fs.ld
+++ b/ports/stm/boards/STM32F411_fs.ld
@@ -13,7 +13,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F411_nvm.ld b/ports/stm/boards/STM32F411_nvm.ld
index 897b99631..5ac3e52a6 100644
--- a/ports/stm/boards/STM32F411_nvm.ld
+++ b/ports/stm/boards/STM32F411_nvm.ld
@@ -14,7 +14,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define the top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F412_fs.ld b/ports/stm/boards/STM32F412_fs.ld
index afd51c6b1..8837bd87d 100644
--- a/ports/stm/boards/STM32F412_fs.ld
+++ b/ports/stm/boards/STM32F412_fs.ld
@@ -13,7 +13,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F746xG_fs.ld b/ports/stm/boards/STM32F746xG_fs.ld
index f1bd3d5dc..be10a1429 100644
--- a/ports/stm/boards/STM32F746xG_fs.ld
+++ b/ports/stm/boards/STM32F746xG_fs.ld
@@ -38,7 +38,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F767_fs.ld b/ports/stm/boards/STM32F767_fs.ld
index 40e67829b..25322b0b6 100644
--- a/ports/stm/boards/STM32F767_fs.ld
+++ b/ports/stm/boards/STM32F767_fs.ld
@@ -13,7 +13,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32H743_fs.ld b/ports/stm/boards/STM32H743_fs.ld
index 686f93ea3..b6c3d5b62 100644
--- a/ports/stm/boards/STM32H743_fs.ld
+++ b/ports/stm/boards/STM32H743_fs.ld
@@ -22,7 +22,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K; /*TODO: this can probably be bigger, but how big?*/
 _minimum_heap_size = 16K;
 
 /* brainless copy paste for stack code. Results in ambiguous hard crash */
diff --git a/ports/stm/supervisor/port.c b/ports/stm/supervisor/port.c
index 779348c02..23ba7d874 100644
--- a/ports/stm/supervisor/port.c
+++ b/ports/stm/supervisor/port.c
@@ -49,7 +49,7 @@
 #include STM32_HAL_H
 
 //only enable the Reset Handler overwrite for the H7 for now
-#if defined(STM32H7)
+#if (CPY_STM32H7)
 
 // Device memories must be accessed in order.
 #define DEVICE 2
@@ -153,16 +153,16 @@ __attribute__((used, naked)) void Reset_Handler(void) {
 static RTC_HandleTypeDef _hrtc;
 
 #if BOARD_HAS_LOW_SPEED_CRYSTAL
-#define RTC_CLOCK_FREQUENCY LSE_VALUE
+static uint32_t rtc_clock_frequency = LSE_VALUE;
 #else
-#define RTC_CLOCK_FREQUENCY LSI_VALUE
+static uint32_t rtc_clock_frequency = LSI_VALUE;
 #endif
 
 safe_mode_t port_init(void) {
     HAL_Init();
     __HAL_RCC_SYSCFG_CLK_ENABLE();
 
-    #if defined(STM32F4)
+    #if (CPY_STM32F4)
         __HAL_RCC_PWR_CLK_ENABLE();
     #endif
 
@@ -170,24 +170,70 @@ safe_mode_t port_init(void) {
     stm32_peripherals_gpio_init();
 
     HAL_PWR_EnableBkUpAccess();
+
+    // TODO: move all of this to clocks.c
     #if BOARD_HAS_LOW_SPEED_CRYSTAL
-    __HAL_RCC_LSE_CONFIG(RCC_LSE_ON);
-    while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) {}
+    uint32_t tickstart = HAL_GetTick();
+
+    // H7/F7 untested with LSE, so autofail them until above move is done
+    #if (CPY_STM32F4) 
+    bool lse_setupsuccess = true;
     #else
-    __HAL_RCC_LSI_ENABLE();
+    bool lse_setupsuccess = false;
     #endif
-    #if BOARD_HAS_LOW_SPEED_CRYSTAL
-    __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
+
+    // Update LSE configuration in Backup Domain control register
+    // Requires to enable write access to Backup Domain of necessary
+    // TODO: should be using the HAL OSC initializer, otherwise we'll need
+    // preprocessor defines for every register to account for F7/H7
+    #if (CPY_STM32F4)
+    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
+    {
+        // Enable write access to Backup domain
+        SET_BIT(PWR->CR, PWR_CR_DBP);
+        // Wait for Backup domain Write protection disable
+        tickstart = HAL_GetTick();
+        while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
+        {
+            if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
+            {
+                lse_setupsuccess = false;
+            }
+        }
+    }
+    #endif
+
+    __HAL_RCC_LSE_CONFIG(RCC_LSE_ON);
+    tickstart = HAL_GetTick();
+    while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) {
+        if((HAL_GetTick() - tickstart ) > LSE_STARTUP_TIMEOUT)
+        {
+            lse_setupsuccess = false;
+            __HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
+            __HAL_RCC_LSI_ENABLE();
+            rtc_clock_frequency = LSI_VALUE;
+            break;
+        }
+    }
+
+    if (lse_setupsuccess) {
+        __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
+    } else {
+        __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
+    }
+
     #else
+    __HAL_RCC_LSI_ENABLE();
     __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
     #endif
+
     __HAL_RCC_RTC_ENABLE();
     _hrtc.Instance = RTC;
     _hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
-    // Divide async as little as possible so that we have RTC_CLOCK_FREQUENCY count in subseconds.
+    // Divide async as little as possible so that we have rtc_clock_frequency count in subseconds.
     // This ensures our timing > 1 second is correct.
     _hrtc.Init.AsynchPrediv = 0x0;
-    _hrtc.Init.SynchPrediv = RTC_CLOCK_FREQUENCY - 1;
+    _hrtc.Init.SynchPrediv = rtc_clock_frequency - 1;
     _hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
 
     HAL_RTC_Init(&_hrtc);
@@ -293,7 +339,7 @@ volatile uint32_t cached_date = 0;
 volatile uint32_t seconds_to_minute = 0;
 volatile uint32_t cached_hours_minutes = 0;
 uint64_t port_get_raw_ticks(uint8_t* subticks) {
-    uint32_t subseconds = RTC_CLOCK_FREQUENCY - (uint32_t)(RTC->SSR);
+    uint32_t subseconds = rtc_clock_frequency - (uint32_t)(RTC->SSR);
     uint32_t time = (uint32_t)(RTC->TR & RTC_TR_RESERVED_MASK);
     uint32_t date = (uint32_t)(RTC->DR & RTC_DR_RESERVED_MASK);
     if (date != cached_date) {
@@ -341,7 +387,7 @@ void RTC_Alarm_IRQHandler(void) {
 
 // Enable 1/1024 second tick.
 void port_enable_tick(void) {
-    HAL_RTCEx_SetWakeUpTimer_IT(&_hrtc, RTC_CLOCK_FREQUENCY / 1024 / 2, RTC_WAKEUPCLOCK_RTCCLK_DIV2);
+    HAL_RTCEx_SetWakeUpTimer_IT(&_hrtc, rtc_clock_frequency / 1024 / 2, RTC_WAKEUPCLOCK_RTCCLK_DIV2);
     HAL_NVIC_SetPriority(RTC_WKUP_IRQn, 1, 0U);
     HAL_NVIC_EnableIRQ(RTC_WKUP_IRQn);
 }
@@ -372,7 +418,7 @@ void port_interrupt_after_ticks(uint32_t ticks) {
         alarm.AlarmMask = RTC_ALARMMASK_ALL;
     }
 
-    alarm.AlarmTime.SubSeconds = RTC_CLOCK_FREQUENCY -
+    alarm.AlarmTime.SubSeconds = rtc_clock_frequency -
                                  ((raw_ticks % 1024) * 32);
     alarm.AlarmTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
     alarm.AlarmTime.StoreOperation = RTC_STOREOPERATION_SET;
diff --git a/shared-bindings/_pixelbuf/PixelBuf.c b/shared-bindings/_pixelbuf/PixelBuf.c
index 61b4c9ae0..626dde680 100644
--- a/shared-bindings/_pixelbuf/PixelBuf.c
+++ b/shared-bindings/_pixelbuf/PixelBuf.c
@@ -44,7 +44,7 @@ extern const int32_t colorwheel(float pos);
 
 static void parse_byteorder(mp_obj_t byteorder_obj, pixelbuf_byteorder_details_t* parsed);
 
-//| .. currentmodule:: pixelbuf
+//| .. currentmodule:: _pixelbuf
 //|
 //| :class:`PixelBuf` -- A fast RGB[W] pixel buffer for LED and similar devices
 //| ===========================================================================
@@ -58,13 +58,13 @@ static void parse_byteorder(mp_obj_t byteorder_obj, pixelbuf_byteorder_details_t
 //|   When brightness is less than 1.0, a second buffer will be used to store the color values
 //|   before they are adjusted for brightness.
 //|
-//|   When ``P`` (pwm duration) is present as the 4th character of the byteorder
+//|   When ``P`` (pwm duration) is present as the first character of the byteorder
 //|   string, the 4th value in the tuple/list for a pixel is the individual pixel
 //|   brightness (0.0-1.0) and will enable a Dotstar compatible 1st byte in the
 //|   output buffer (``buf``).
 //|
-//|   :param ~int size: Number of pixelsx
-//|   :param ~str byteorder: Byte order string (such as "BGR" or "PBGR")
+//|   :param ~int size: Number of pixels
+//|   :param ~str byteorder: Byte order string (such as "BGR" or "BGRP")
 //|   :param ~float brightness: Brightness (0 to 1.0, default 1.0)
 //|   :param ~bool auto_write: Whether to automatically write pixels (Default False)
 //|   :param bytes header: Sequence of bytes to always send before pixel values.
@@ -265,7 +265,7 @@ STATIC mp_obj_t pixelbuf_pixelbuf_show(mp_obj_t self_in) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(pixelbuf_pixelbuf_show_obj, pixelbuf_pixelbuf_show);
 
-//| .. function:: fill(color)
+//| .. method:: fill(color)
 //|
 //|   Fills the given pixelbuf with the given color.
 //|
diff --git a/shared-bindings/busio/UART.c b/shared-bindings/busio/UART.c
index f231924d5..883b4630f 100644
--- a/shared-bindings/busio/UART.c
+++ b/shared-bindings/busio/UART.c
@@ -39,6 +39,9 @@
 #include "py/stream.h"
 #include "supervisor/shared/translate.h"
 
+#define STREAM_DEBUG(...) (void)0
+// #define STREAM_DEBUG(...) mp_printf(&mp_plat_print __VA_OPT__(,) __VA_ARGS__)
+
 
 //| .. currentmodule:: busio
 //|
@@ -219,6 +222,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(busio_uart___exit___obj, 4, 4, busio_
 
 // These three methods are used by the shared stream methods.
 STATIC mp_uint_t busio_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
+    STREAM_DEBUG("busio_uart_read stream %d\n", size);
     busio_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     check_for_deinit(self);
     byte *buf = buf_in;
diff --git a/shared-bindings/time/__init__.c b/shared-bindings/time/__init__.c
index 8d7f2f3fd..ef75a23bd 100644
--- a/shared-bindings/time/__init__.c
+++ b/shared-bindings/time/__init__.c
@@ -188,6 +188,14 @@ void struct_time_to_tm(mp_obj_t t, timeutils_struct_time_t *tm) {
     tm->tm_yday = mp_obj_get_int(elems[7]);
     // elems[8] tm_isdst is not supported
 }
+#if MICROPY_LONGINT_IMPL == MICROPY_LONGINT_IMPL_NONE
+// Function to return a NotImplementedError on platforms that don't
+// support long integers
+STATIC mp_obj_t time_not_implemented(void) {
+    mp_raise_NotImplementedError(translate("No long integer support"));
+}
+MP_DEFINE_CONST_FUN_OBJ_0(time_not_implemented_obj, time_not_implemented);
+#endif
 
 #if MICROPY_LONGINT_IMPL != MICROPY_LONGINT_IMPL_NONE
 mp_obj_t MP_WEAK rtc_get_time_source_time(void) {
@@ -307,6 +315,12 @@ STATIC const mp_rom_map_elem_t time_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_time), MP_ROM_PTR(&time_time_obj) },
     { MP_ROM_QSTR(MP_QSTR_monotonic_ns), MP_ROM_PTR(&time_monotonic_ns_obj) },
     #endif
+    #if MICROPY_LONGINT_IMPL == MICROPY_LONGINT_IMPL_NONE
+    { MP_ROM_QSTR(MP_QSTR_localtime), MP_ROM_PTR(&time_not_implemented_obj) },
+    { MP_ROM_QSTR(MP_QSTR_mktime), MP_ROM_PTR(&time_not_implemented_obj) },
+    { MP_ROM_QSTR(MP_QSTR_time), MP_ROM_PTR(&time_not_implemented_obj) },
+    { MP_ROM_QSTR(MP_QSTR_monotonic_ns), MP_ROM_PTR(&time_not_implemented_obj) },
+    #endif
 };
 
 STATIC MP_DEFINE_CONST_DICT(time_module_globals, time_module_globals_table);
diff --git a/supervisor/shared/external_flash/common_commands.h b/supervisor/shared/external_flash/common_commands.h
index cc0da2175..2eaa84833 100644
--- a/supervisor/shared/external_flash/common_commands.h
+++ b/supervisor/shared/external_flash/common_commands.h
@@ -43,5 +43,6 @@
 #define CMD_QUAD_READ 0x6b
 #define CMD_ENABLE_RESET 0x66
 #define CMD_RESET 0x99
+#define CMD_WAKE 0xab
 
 #endif  // MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_COMMON_COMMANDS_H
diff --git a/supervisor/shared/external_flash/devices.h b/supervisor/shared/external_flash/devices.h
index 57c52e2ea..f99fad4e7 100644
--- a/supervisor/shared/external_flash/devices.h
+++ b/supervisor/shared/external_flash/devices.h
@@ -64,6 +64,15 @@ typedef struct {
     // True when the status register is a single byte. This implies the Quad Enable bit is in the
     // first byte and the Read Status Register 2 command (0x35) is unsupported.
     bool single_status_byte: 1;
+
+    // Does not support using a ready bit within the status register
+    bool no_ready_bit: 1;
+
+    // Does not support the erase command (0x20)
+    bool no_erase_cmd: 1;
+
+    // Device does not have a reset command
+    bool no_reset_cmd: 1;
 } external_flash_device;
 
 // Settings for the Adesto Tech AT25DF081A 1MiB SPI flash. It's on the SAMD21
@@ -426,6 +435,27 @@ typedef struct {
     .single_status_byte = false, \
 }
 
+// Settings for the Everspin MR20H40 / MR25H40 magnetic non-volatile RAM
+// Datasheet: https://www.everspin.com/supportdocs/MR25H40CDFR
+#define MR2xH40 {\
+    .total_size = (1 << 22), /* 4 MiB */ \
+    .start_up_time_us = 10000, \
+    .manufacturer_id = 0xef, /*no JDEC*/ \
+    .memory_type = 0x40, /*no JDEC*/ \
+    .capacity = 0x14, /*no JDEC*/ \
+    .max_clock_speed_mhz = 10, \
+    .quad_enable_bit_mask = 0x00, \
+    .has_sector_protection = false, \
+    .supports_fast_read = false, \
+    .supports_qspi = false, \
+    .supports_qspi_writes = false, \
+    .write_status_register_split = false, \
+    .single_status_byte = true, \
+    .no_ready_bit = true, \
+    .no_erase_cmd = true, \
+    .no_reset_cmd = true, \
+}
+
 // Settings for the Macronix MX25L1606 2MiB SPI flash.
 // Datasheet:
 #define MX25L1606  {\
diff --git a/supervisor/shared/external_flash/external_flash.c b/supervisor/shared/external_flash/external_flash.c
index bfc434664..5bde7fd48 100644
--- a/supervisor/shared/external_flash/external_flash.c
+++ b/supervisor/shared/external_flash/external_flash.c
@@ -27,7 +27,6 @@
 
 #include <stdint.h>
 #include <string.h>
-
 #include "supervisor/flash.h"
 #include "supervisor/spi_flash_api.h"
 #include "supervisor/shared/external_flash/common_commands.h"
@@ -58,9 +57,13 @@ static supervisor_allocation* supervisor_cache = NULL;
 
 // Wait until both the write enable and write in progress bits have cleared.
 static bool wait_for_flash_ready(void) {
-    uint8_t read_status_response[1] = {0x00};
     bool ok = true;
     // Both the write enable and write in progress bits should be low.
+    if (flash_device->no_ready_bit){
+        // For NVM without a ready bit in status register
+        return ok;
+    }
+    uint8_t read_status_response[1] = {0x00};
     do {
         ok = spi_flash_read_command(CMD_READ_STATUS, read_status_response, 1);
     } while (ok && (read_status_response[0] & 0x3) != 0);
@@ -92,15 +95,18 @@ static bool write_flash(uint32_t address, const uint8_t* data, uint32_t data_len
     }
     // Don't bother writing if the data is all 1s. Thats equivalent to the flash
     // state after an erase.
-    bool all_ones = true;
-    for (uint16_t i = 0; i < data_length; i++) {
-        if (data[i] != 0xff) {
-            all_ones = false;
-            break;
+    if (!flash_device->no_erase_cmd){
+        // Only do this if the device has an erase command
+        bool all_ones = true;
+        for (uint16_t i = 0; i < data_length; i++) {
+            if (data[i] != 0xff) {
+                all_ones = false;
+                break;
+            }
+        }
+        if (all_ones) {
+            return true;
         }
-    }
-    if (all_ones) {
-        return true;
     }
 
     for (uint32_t bytes_written = 0;
@@ -121,6 +127,10 @@ static bool write_flash(uint32_t address, const uint8_t* data, uint32_t data_len
 static bool page_erased(uint32_t sector_address) {
     // Check the first few bytes to catch the common case where there is data
     // without using a bunch of memory.
+    if (flash_device->no_erase_cmd){
+        // skip this if device doesn't have an erase command.
+        return true;
+    }
     uint8_t short_buffer[4];
     if (read_flash(sector_address, short_buffer, 4)) {
         for (uint16_t i = 0; i < 4; i++) {
@@ -151,10 +161,16 @@ static bool page_erased(uint32_t sector_address) {
 static bool erase_sector(uint32_t sector_address) {
     // Before we erase the sector we need to wait for any writes to finish and
     // and then enable the write again.
+    if (flash_device->no_erase_cmd){
+        // skip this if device doesn't have an erase command.
+        return true;
+    }
     if (!wait_for_flash_ready() || !write_enable()) {
         return false;
     }
-
+    if (flash_device->no_erase_cmd) {
+        return true;
+    }
     spi_flash_sector_command(CMD_SECTOR_ERASE, sector_address);
     return true;
 }
@@ -192,25 +208,33 @@ void supervisor_flash_init(void) {
 
     spi_flash_init();
 
+#ifdef EXTERNAL_FLASH_NO_JEDEC
+    // For NVM that don't have JEDEC response
+    spi_flash_command(CMD_WAKE);
+    for (uint8_t i = 0; i < EXTERNAL_FLASH_DEVICE_COUNT; i++) {
+        const external_flash_device* possible_device = &possible_devices[i];
+        flash_device = possible_device;
+        break;
+    }
+#else
     // The response will be 0xff if the flash needs more time to start up.
     uint8_t jedec_id_response[3] = {0xff, 0xff, 0xff};
     while (jedec_id_response[0] == 0xff) {
         spi_flash_read_command(CMD_READ_JEDEC_ID, jedec_id_response, 3);
     }
-
-    for (uint8_t i = 0; i < EXTERNAL_FLASH_DEVICE_COUNT; i++) {
-        const external_flash_device* possible_device = &possible_devices[i];
-        if (jedec_id_response[0] == possible_device->manufacturer_id &&
-            jedec_id_response[1] == possible_device->memory_type &&
-            jedec_id_response[2] == possible_device->capacity) {
-            flash_device = possible_device;
-            break;
+        for (uint8_t i = 0; i < EXTERNAL_FLASH_DEVICE_COUNT; i++) {
+            const external_flash_device* possible_device = &possible_devices[i];
+            if (jedec_id_response[0] == possible_device->manufacturer_id &&
+                jedec_id_response[1] == possible_device->memory_type &&
+                jedec_id_response[2] == possible_device->capacity) {
+                flash_device = possible_device;
+                break;
+            }
+        }
+#endif
+        if (flash_device == NULL) {
+            return;
         }
-    }
-
-    if (flash_device == NULL) {
-        return;
-    }
 
     // We don't know what state the flash is in so wait for any remaining writes and then reset.
     uint8_t read_status_response[1] = {0x00};
@@ -219,14 +243,16 @@ void supervisor_flash_init(void) {
         spi_flash_read_command(CMD_READ_STATUS, read_status_response, 1);
     } while ((read_status_response[0] & 0x1) != 0);
     if (!flash_device->single_status_byte) {
-      // The suspended write/erase bit should be low.
-      do {
-        spi_flash_read_command(CMD_READ_STATUS2, read_status_response, 1);
-      } while ((read_status_response[0] & 0x80) != 0);
+        // The suspended write/erase bit should be low.
+        do {
+            spi_flash_read_command(CMD_READ_STATUS2, read_status_response, 1);
+        } while ((read_status_response[0] & 0x80) != 0);
     }
 
-    spi_flash_command(CMD_ENABLE_RESET);
-    spi_flash_command(CMD_RESET);
+    if (!(flash_device->no_reset_cmd)){
+        spi_flash_command(CMD_ENABLE_RESET);
+        spi_flash_command(CMD_RESET);
+    }
 
     // Wait 30us for the reset
     common_hal_mcu_delay_us(30);